how to improve the coupling coefficient of on-chip CMOS transformer
I built a transformer made by two spiral inductor in ADS Momentum and simulate the coupling coefficient of the transformer . Its K is only around 0.4 at in 5GHz.
I tried different layout method such as symmetric and stacked layout . I also increased the size the two spiral inductor , my inductance L1 and L2 is around 0.2nH for a 100um*100um layout , Is this inductance too small?
My substrate is like :
Cond1: 4um Sigma-4.51E7 S/m
SiO2 upper [VIA]diel 4.51E7
COnd2: 0.66um ( I varied this from 3um to 0.66um) sigma = 4.51E7
SiO2 Lower : 5um Er=4
Silicon Er=11.9 , 6.67S/m , 500um
How can I get a K>0.8 ?
Thanks
To increase the coupling coefficient you have to increase somehow the number of turns of the inductor.
0.2nH seems to be very small, even for 5GHz.
If you decrease the distance between the spirs, coupling will be improved.
Use minimum DR for you process and try..
Reduce trace's width. Of course this will reduce also Q but will increase K.
Your IL is a function of K^2.Q1.Q2. SO you have a trade-off in choosing the width. Also you have to consider the current affordability of transformer
Hi noanob,We can only get S parameters data from ADS Momentum results.Therefore I want to know how to use S parameters to count specs of trnasformer ,such as ILm,Efficiency,k,.etc. Many Thx!
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