How to find self oscillation frequency of frequency divider

I have designed a CML based frequency divider with a division ratio of 50. It divides signal from 2.5GHz to 50 MHz.
But I am not sure how to find out the self oscillation frequency of the system.

Please let me know ,the method. Also let me know the procedure to simulate the sensitivity characteristics of the divider.

To my knowledge most frequency dividers oscillate at some inherent frequency. Once synchronized by an external signal, they divide its frequency.
With all dividers I tested, the best was to use a spectrum analyzer to see the "free-running" frequency, then the correct division from certain input level.

Is there a way to find out the self oscillation frequency with simulation. Like any perticular setup that allows the system to run in its free running frequency.?

Why everybody can only think about simulation?
Check the data sheet of your frequency divider, maybe the maker indicated the free-running frequency there. I failed to find it this way, so I have used a spectrum analyzer to find out. I needed a signal source with a variable output power to test the frequency divider over the full range.

Read paragraph 4.2 to find the self-oscillation formula