nmos cross coupled lc vco

The phase noise of a 2.5G CMOS cross-coupled VCO is -92dBc/Hz at 100kHz offset frequency. Is it too high or it is acceptable?


Thanks.

Not bad

I think it's high. At 100 KHz you can get -100dBc/Hz from an LC CMOS oscillator

i think it will depend on the application of the VCO and which system it will be used in

Khouly

Kouly is right, if you are using it in an digital comms system and good BER is critical then the stated phase noise is probably a little high at 100kHz offset figures of -100dBc/Hz or better is good and desirable.

Shogun

Thanks a lot. If better phase noise is desired, what can be done to improve it?

It depends on the architecture you have adopted for the VCO. The question is whether there is any room for improvement in your design. For example, would it be possible to increase the Quality Factor of your resonator inductor (e.g. stitch more metals to decrease series resistance) or increase the gm of your PMOS/NMOS cross coupled pair? Both these changes will improve Phase Noise. There is a sweet spot for the optimum gm that is thoroughly defined through the Kurokawa analysis.

BTW, are you using PMOS or NMOS for cross coupling? Generally, PMOS yield significantly lower noise.

--pap

Classical figure of merit for oscillators should take into account also current consumption to have sense. How much is the core current in your design?
Mazz

i agree with Mazz, u also need to check the power consumption

khouly

The current is 2.5mA. Power consumption is 3.3mW. Thanks.

Roughly FOM=-175 dBc/Hz according to one of the widely accepted figure-of-merit, as defined in scholar.lib.vt.edu/theses/available/etd-05122003-153242/unrestricted/disThesis.pdf
Not bad.
Mazz

Hi Adam,

One helpful way to try to optimize for PN is to look for the noise contribution list(noise summery).

Regards

Ｉｔ　is detemined by you system.
If you get that result with 1mA current, it is good.
But if your current is more than 2mA, the phase can be as large as -100dBc@100k

Added after 1 minutes:

So large current, try to improve it to -100dBc.

It depends on your application and the current consumption. You may use vco FOM to evaluated it.

In the P2P microwave telecom system, for PDH, the PN should be better than -95dBc/Hz at 100K; for SDH, the PN should be better than -100dBc/Hz at 100K.

You can use Analog Device free software ADISimPLL to simulate your VCO, and find the main noise source of your PLL.

Hello every body.... i try to simulate LC vco in HSPICe, i have read all the post and found that my tail current must be 2mA or like this.
but in my simulation i try to use 20mA tail current, and my phase noise is better than -120dBc for 100Mhz offset..
would you please look at my design and tell your idea about my design...thank you so much my friend.



VCO_OK
**** 2.2ghz - 2.6 kvco=230
******************************
.PROTECT
*.lib 'C:\Hspice2003.03\Models\RF018.l' TT_RFMOS
.lib 'D:\Model\RF018.l' TT_RFMOS
.UNPROTECT
.OPTIONS post
************************************************** *********
.ic outp=1v outn=0v
Vdd Vdd 0 1.8v
vctrl vt 0 1v

.global Vdd vt 0
************************************************** ************************************************** ***
********************Main Program******************************************* **********************

X_vco vt outn outp voutn2 voutp2 vco24
************************************************** ************************************************** ***
************************************************ Voltage Control Oscillator Sub Circuits******
**********VCO *
.subckt vco24 vt outn outp voutn2 voutp2 *
mp1 outp outn vdd vdd pch_rf l=.18u w=30u m=45 *
mp2 outn outp vdd vdd pch_rf l=.18u w=30u m=45 *
m1 outp outn vbias 0 nch_rf l=.18u w=100u * m=50 *
m2 outn outp vbias 0 nch_rf l=.18u w=100u * m=50 *
*X_varactor outn outp varactor *
X_self1 outn outp self2 *
x_bias vbias currentmirror_vco *
X_loadn voutn2 0 load_vco *
*X_loadp outp 0 load_vco *
x_not11 outn voutn1 not_vco *
x_not12 voutn1 voutn2 not_vco *
x_not21 outp voutp1 not_vco *
x_not22 voutp1 voutp2 not_vco *
xc1 outn vt MOSCap_g6 * l=.5u w=8.2u *
xc2 outp vt MOSCap_g6 *
.ends vco24 *
******************************LOAD_VCO *
.subckt load_vco in 0 *
ml1 0 in 0 0 nch_rf l=.18u w=0.22u m=100 *
.ends load_vco *
*****************************VARACTOR_VCO *
.subckt varactor out1 out2 *
xc1 out1 vt MOSCap_g6 * l=.5u w=8.2u *
xc2 out2 vt MOSCap_g6 *
.ends varactor *
****************************SELF_VCO *
.subckt self2 L1 L2 *
xl1 l1 l2 spiral_rad turn= 4.5 rad=40u *
xl2 l1 l2 spiral_rad turn= 4.5 rad=40u *
xl3 l1 l2 spiral_rad turn= 4.5 rad=40u *
xl4 l1 l2 spiral_rad turn= 4.5 rad=40u *
xl5 l1 l2 spiral_rad turn= 4.5 rad=40u *
.ends self2 *
****************************NOT_VCO *
.subckt not_vco in out *
c1 in gate 10p *
r1 gate out 10k *
Mp1 out gate vdd vdd pch_rf l=0.18u w=5u *
Mn1 out gate 0 0 nch_rf l=0.18u w=2u *
*Ml3 0 out 0 0 nch_rf l=0.18u w=.22u M=50 *
.ends not_vco *
*************************Currentmirror_VCO *
.subckt currentmirror_vco out *
m1 out 2 0 0 nch_rf l=.18u w=100u m=45 *
m2 1 1 0 0 nch_rf l=.18u w=20u *
r1 1 2 150kohm *
cf 2 0 100pf *
i1 vdd 1 100uA *
v1 out 0 .3v *
.ends currentmirror_vco *
************************************************** ************************************************** **
************************************************** ************************************************** ***
************************************************** ************************************************** ***
************************************************** ********* ANALYSIS *****************************
************************************************** ************************************************** ***
.TRAN 100ns 300ns START=100ns UIC sweep vctrl 0 1.8 .3
.HBOSC TONE=2.485000g NHARMS=9 PROBENODE=outn ,0 ,1
.phasenoise V(outn) DEC 10 1x 500x METHOD=0
.fft v(voutn2) window=Bartlett fmin=3.673489g fmax=4g format = unorm *freq=3.67g
.print phasenoise phnoise_flicker
.PRINT PHASENOISE PHNOISE JITTER
.PROBE PHASENOISE phnoise phnoise(outn)
.OP 27ps
.probe
.end

hello
while simulation VCO in (Microwave office/Analog Environment) by AWR using 0.18 um Tech. i am finding following problems
Pl help me to fix these problems

1) Measurement - VCO_SSDEL:OSC_FREQ()[*] : Measurement requires an oscillator simulator
2) Measurement - VCO_SSDEL:Vtime(DCVS.V4,1)[*] : Unable to compute Vtime measurement
3) Measurement - VCO_SSDEL:DB(L_USB_F(PORT_1,0,1))[*] : Measurement requires an oscillator simulator
4) Step size for source stepping has decreased below a minimum allowed value
5) Failed to find start-up conditions in the specified frequency range.

thanks in advance
Rk