rf choke design

Hello guys

I'm doing the LNA design and now it gets down to the final step and I want to design all the discrete component into microstrip line, as the following circuit.

I got the L and C from muRata Semiconductor and synthesized the nonlinear model for these two components (as shown in plot)

I wonder how to design that in ML, quarter-wave length can be done? But how? Or should I use the muRata L and C or just use the ideal L and C from ADS and then to transfrom to ML?

Please help me on that, thanks so much!

For the RF choke you can use a Bias tee in microstrip. A λ/4 High Impedance Line (usually 100Ohm) with a O/C radial stub at the end centered at your frequency of operation. For reference about Bias tees check the following site: However 1.2nH will be a very short line. Play in ADS and see if is feasible

http://www.microwaves101.com/encyclo...ve.cfm#biastee

I am not sure your frequency of operation but looking from your schematic model that u have extremely low CAP values I will suggest to use an Interdigital Cap. ADS has model for such cap and u can see if is feasible.

These are not nonlinear models instead linear models..
Lambda/4 circuit will bahave a open circuit while its other port is short circuited at the frequency of operation.If the fequency band is large, in this case you may practically use an inductor that will behave 10 times greater than load impedance..

Or multiple lambda circuits and low pass filters can be a solution..

There are many alternatives which depends on place and cost..

Thanks man!

That is a great website! Yes I did notice that 1.2nH is pretty unrealisitc while implementing in microstrip. So I tuned a bit to sacrifice the performance with a seemly reasonable size of inductor.

Appreciate you both!

i am new in ads and find your post useful i want to simulate attached picture in cst do u know haw i can simulate that rf choke?