RF Switch in SOS process

I am going through a paper on RF switches in SOS process.It is mentioned that compression is reached when Vds forces Vgs to rise above vth. |Vdspk|=2(vth-Vgs). Can anyone explain how this equation is obtained. At vds extremes, FET is temporarily on and passes current and clips the voltage resulting in compression?

For example vth=0. To handle large Vds, Do VGS need to be biased below 0 V?.

I am attaching figure for your reference. Can any one explain this working?.

The switches work because the gate charge is carried
locally on Cgs/Cgd and the resistor only provides the
average value. This is what the picture shows.

You can only have so much Vds. More pin-pin power
handling is obtained by stacking devices (each with
their own separate resistor feed).

When Vds couples onto the gate capacitance enough
to turn an "off" FET "on", the shunt FETs in the switch
network (not shown - you have generally two series
and one shunt in the middle, in order to get HF isolation)
will begin to turn on and this is where clipping comes in.