rdl redistribution layer

Has anybody done any Full-Wave EM simulation on Redistribution Layer (RDL) of flip-chip die? When a die is flip-chipped on a package or pcb, I guess the RDL would affect the die itself a lot more than the package/pcb.

Here comes the question. What should I take as the reference? Should I take the plane in package/pcb? A die usually does not contain any plane. Should I take the top metal layer of the flip-chip die as the reference? But it is hardly a plane.

Can someone give comment?

regards,
wlcsp