HFSS Inter-digitated Capacitor

Hello all,

I am trying to simulate IDC on HFSS but it just stuck at calculating the matrix step, I am wondering if anyone could help me out on that. I have attached the HFSS file on hereIDC.rar. Thanks.

hello I am trying to look at your design. however since you are exciting using two ports what is the reason for this? can this be modeled using single excitation? this brings to me the parallel plate capacitor , it is easy to model using a single port excitation but I could not model using two ports. any idea?

Hello Adnan, I used two ports because I found an example online that was doing it. However, I was not sure as it didn't know show me any result of the simulation. I could change it to one port... The only other thing I have simulated were patch and loop antenna so I don't know much about setting up simulation for IDC. Thanks.

Hi,

I am very new to HFSS. I am trying to simulate an inter digitated capacitor on a wafer. So far I have just created the geometry in HFSS (Please find the file attached). Could anyone please tell me how to excite the capacitor ?