[Moved]: Ground plane under smps magnetics
时间:03-30
整理:3721RD
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I read a few application notes regarding effective ground planes, and they usually make a vague reference that the ground plane can be voided under the magnetic components.
I think the text is vague because it depends on the type of ground plane, this is how I'm interpreting what I have read, please let me know if I'm getting the gist of it or I'm misinterpreting what I have read:
- if there is a dedicated chassis ground plane, this plane would not be voided under the magnetics, as this plane would help capture and direct any noise from the magnetics to earth.
- An analog ground plane should be voided under the magnetics to minimize induced noise into the quiet ground plane.
My layout has a couple of SMPS regulators, as well as an analog portion that I'm attempting to keep as noise free as possible. I have two dedicated ground planes, I'm using one for the SMPS ground, and the other for the analog ground, although the planes overlap each other for most of the board they only share a common connection at one point (at the battery negative terminal). Does this sound like a reasonable layout strategy?
I have intentionally not stitched the two grounds together with a bunch of vias so the SMPS ground current stays in the SMPS ground plane.
I think the text is vague because it depends on the type of ground plane, this is how I'm interpreting what I have read, please let me know if I'm getting the gist of it or I'm misinterpreting what I have read:
- if there is a dedicated chassis ground plane, this plane would not be voided under the magnetics, as this plane would help capture and direct any noise from the magnetics to earth.
- An analog ground plane should be voided under the magnetics to minimize induced noise into the quiet ground plane.
My layout has a couple of SMPS regulators, as well as an analog portion that I'm attempting to keep as noise free as possible. I have two dedicated ground planes, I'm using one for the SMPS ground, and the other for the analog ground, although the planes overlap each other for most of the board they only share a common connection at one point (at the battery negative terminal). Does this sound like a reasonable layout strategy?
I have intentionally not stitched the two grounds together with a bunch of vias so the SMPS ground current stays in the SMPS ground plane.
You don't want to waste any inductor energy on stirring
up eddy currents in ground planes. Last set of eval boards
I designed, left a cutout under the coil (we also wanted
to minimize shunt C on the output switch node).
If you must pass ground through, under the inductor, then
consider slotting it longitudinally so that the eddy currents
can't see much area per strip.
The question can't be answered without referring to the inductor type. Some have large stray field others have a closed magnetical path at the bottom side.
FvM,
Thank you for responding, I chose shielded type inductors and voided the ground plane under the magnetics.