微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 微波和射频技术 > 电磁仿真讨论 > USB 2 traces spacing standards

USB 2 traces spacing standards

时间:03-30 整理:3721RD 点击:
hi all


Im designing a board with usb2 lines ( the board is very small 18X18mm)

i have some space issue and i wanted to know. as far as i read its recommended to keep space between the USB line of 8mil ( trace width 6mil ).

can i keep only 5mil ? or its can cuse croostalk or some other issus?

thanks

You'll implement the transmission line impedance according to the USB spec. Spacing may vary.

In addition, consider that a certain impedance mismatch can be tolerated for a short connection.

thanks for you for your replay.

what is the maximum length that is ok to impedance mismatch?

thanks

You should refer mismatch calculations to the high speed USB cable specification, 90 ohm +/-15 % differential impedance (Z0), 30 ohm +/- 30 % common mode impedance (Zcm). In most cases these impedances can be implemented in a PCB design. There's no reason to design with a systematical mismatch, you should better use the impedance margin of the specification for production tolerances.

You didn't yet tell any PCB design details, e.g. substrate height and number of layers. In a multi-layer PCB, you different options to choose a ground plane for the USB traces, also coplanar with or without ground can be an option.

The USB traces should be preferably shielded against interfering signals, e.g. by embedding it with ground, Vusb or other ground-equivalent low impedance nets.

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top