[Moved]: SONOS memory problem with Sentaurus TCAD in simulation
时间：03-29
整理：3721RD
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Hi, i'm simulating SONOS memory with Sentaurus TCAD.
I'm experimenting with SONOS sdevice file existing in existed sentaurus.
That's code is below here.
You can see more information , sde name in existed sentaurus file.
I want to see that memory is working by "HEI" and "HH with BTB Tunneling".
For example, I would like to experiment with applying a constant 5V to the gate and 3V to the drain to get the electrons in to the trap.
Conversely, in the case of HH, I would like to experiment with applying a constant -5V to the gate and 3V to the drain to get the holes in to the trap.
In case of erase, I want to experiment with BTB tunneling besides HH.
Where can i add any phrases to work like above?
And then how can i change the gate or drain voltage over time?
Please help me
I'm experimenting with SONOS sdevice file existing in existed sentaurus.
That's code is below here.
Code:
==========================================================================
Electrode {{Name="gate" Voltage= 0 Material= "PolySi" Voltage=(!( set t1p 0 for { set i 1 } { Si <= @cycles@ } { incr i } { set t2p [expr St1p + 1e-6] set t3p [expr St1p + (@dtp@*1e-3)] set t4p [expr St2p + (@dtp@*1e-3)] set t1e [expr St3p + 2.5e-3] set t2e [expr St1e + 1e-6] set t3e [expr St1e + (@dte@*1e-3)] set t4e [expr St2e + (@dte@*1e-3)]
puts " 0 at [format %0.6e St1p], @Vgp@ at [format %0.6e St2p], @Vgp@ at [format %0.6e St3p], 0 at [format %0.6e St4p]," puts " 0 at [format %0.6e St1e], @Vge@ at [format %0.6e St2e], @Vge@ at [format %0.6e St3e], 0 at [format %0.6e St4e]," set t1p [expr St3e + 5e-3] } )! )}
{Name="substrate" Voltage= 0}{Name="drain" Voltage= 0}{Name="source" Voltage= 0}
}
Physics {eBarrierTunneling "Gateoxb_Substrate" hBarrierTunneling "Gateoxb_Substrate"eBarrierTunneling "Gateoxt_Polygate" hBarrierTunneling "Gateoxt_Polygate"
}
Physics(Material="Silicon") {Recombination(SRH(DopingDependence))Mobility(DopingDependence HighFieldSaturation)
}
Physics(Material="NitrideAsSemiconductor") {Traps( (Donor Level EnergyMid= 2.5 FromConductionBand Conc= 1e19 eXSection= 1e-13 hXSection= 1e-13 eBarrierTunneling(NonLocal= "Gateoxb_Substrate" NonLocal= "Gateoxt_Polygate") hBarrierTunneling(NonLocal= "Gateoxb_Substrate" NonLocal= "Gateoxt_Polygate") PooleFrenkel
TrapVolume= 1e-15 ) (Acceptor Level EnergyMid= 1.0 FromConductionBand Conc= 1e19 eXSection= 1e-13 hXSection= 1e-13 eBarrierTunneling(NonLocal= "Gateoxb_Substrate" NonLocal= "Gateoxt_Polygate") hBarrierTunneling(NonLocal= "Gateoxb_Substrate" NonLocal= "Gateoxt_Polygate") PooleFrenkel
TrapVolume= 1e-15
))
}
=================================================================
I want to see that memory is working by "HEI" and "HH with BTB Tunneling".
For example, I would like to experiment with applying a constant 5V to the gate and 3V to the drain to get the electrons in to the trap.
Conversely, in the case of HH, I would like to experiment with applying a constant -5V to the gate and 3V to the drain to get the holes in to the trap.
In case of erase, I want to experiment with BTB tunneling besides HH.
Where can i add any phrases to work like above?
And then how can i change the gate or drain voltage over time?
Please help me