PCB Layout design to reduce unwanted magnetic coupling

Hi guys, I know normally you design the noise trace pair(e.g Vdd and Vss) close to each other to reduce the magnetic coupling to other nets, but I do not understand what is the mathematical explanation of why this is helpful to reduce magnetic coupling.

One thing I can see is that the Vdd/Vss current loop become small, but why small current loop is able to reduce magnetic coupling, I need your help!

Hi,

The loop acts like a loop antenna. The bigger the enclosed area the "better" the antenna .... the worse EMI and EMC, because the lower cutoff frequency (HP) becomes lower.

Additionally when they are close to each other:
* there is better capacitive coupling
* the magnetic field of both lines compensate each other ... resulting in lowered series impedance

Klaus

Lines closer together -> less self inductance in that loop -> less mutual inductance