请教ICC中关于Timing Analasis的几个命令

(1) set timing_enable_multiple_clocks_per_reg true
(2) set case_analysis_with_logic_constants true
(3) set_fix_multiple_port_nets -all -buffer_constants
请问这三条命令是什么意思啊?谢谢！

(1) 允许有多个时钟触发寄存器（比如两个时钟经多选器后驱动寄存器）
(2) 使得case值在组合逻辑中传递
(3) 如果有constant连接到多个port，在每个port前加buffer
请大牛们鉴定

哦，谢谢啊，，不过第二句我还是不大理解，能详细点吗?

找本ICC的workshop看一下就清楚了 上面还有图解

小编你好，第二条命令我还是不怎么明白，workshop上也没讲清楚，请小编指点指点我呀。

When set to true, this variable enables constant propagation, even if a design
contains only logic constants. When set to false (the default), constant propagation
is not performed unless a set_case_analysis command is specified. The
disable_case_analysis variable overrides the case_analysis_with_logic_constants
variable. If the disable_case_analysis variable is set, no constants are propagated.

student user guide上面有，你看看

好的，我明白了。谢谢！

嗯，我知道了，谢谢你！

也正在看这个问题，不错

-all
是指所有nets 包括constant吧

谢谢你的分享

Enables or disables analysis of multiple clocks that reach a single register.
Default value for this variable is ture.

This variable enables or disables analysis of multiple clocks that reach a register clock pin. When true (the default), all clocks reaching the register are analyzed simultaneously. When false, PrimeTime selects a random clock for analysis from among all clocks reaching a register clock pin. Do not change the value of timing_enable_multiple_clocks_per_reg from the default (true) unless you want this behavior.
If you set this variable to false and your design has multiple clocks per register, you should specify a clock to use withset_data_check -clock.