请教 PT hold time report的问题
APR长clock tree之后跑PT
hold time report的slack为负 (reoprt请参考下方)
原因是因为PT分析时
data path是走clock tree经FF i_core_m/i_rosc_trim/shi_dat_reg_1_ 的CK 到Q
再到目标FF i_core_m/i_rosc_trim/shi_dat_reg_2_ 的D
clock path则走一样的clock tree路径到目标FF i_core_m/i_rosc_trim/shi_dat_reg_2_ 的CK
PT把data path用minimux 条件去计算
而clock path用maximux 条件去计算
data path 和clock path都经过同样的clock tree路径
PT这样子分析的话clock tree越长则slack会越负
因为这样子的report有好几千个实在太多了
请问一下
有甚么方法或指令可以让PT不要吐出把这类型的report呢
谢谢
------------------------------------------------------------------
Startpoint: i_core_m/i_rosc_trim/shi_dat_reg_1_
(rising edge-triggered flip-flop clocked by gen_xtal_src_tmp_x)
Endpoint: i_core_m/i_rosc_trim/shi_dat_reg_2_
(rising edge-triggered flip-flop clocked by gen_xtal_src_tmp_x)
Path Group: gen_xtal_src_tmp_x
Path Type: min
PointFanoutCapTransIncrPath
----------------------------------------------------------------------------------------------
clock gen_xtal_src_tmp_x (rise edge)0.000.00
clock clk_xtal (source latency)0.000.00
uc_xtal_src/Y (BUFX4)0.000.000.00 r
xtal_src (net)10.01
i_core_m/i_clkmux/uc_xtal_src_tmp/B (MX2X4)0.000.00 &0.00 r
i_core_m/i_clkmux/uc_xtal_src_tmp/Y (MX2X4) (gclock source)0.080.13 &0.13 r
i_core_m/i_clkmux/xtal_src_tmp (net)10.03
i_core_m/i_clkmux/CLKINVX8G2B1I1_1/A (CLKINVX8)0.080.00 &0.13 r
i_core_m/i_clkmux/CLKINVX8G2B1I1_1/Y (CLKINVX8)0.220.13 &0.26 f
.........................
.........................
.........................
i_core_m/i_rosc_trim/CLKBUFX1G3B1I2/A (CLKBUFX1)0.120.00 &2.12 r
i_core_m/i_rosc_trim/CLKBUFX1G3B1I2/Y (CLKBUFX1)0.180.17 &2.29 r
i_core_m/i_rosc_trim/xtal_in_G3B1I2ASTHNet419 (net)30.02
i_core_m/i_rosc_trim/shi_dat_reg_1_/CK (DFFSHQX1)0.180.00 &2.29 r
i_core_m/i_rosc_trim/shi_dat_reg_1_/Q (DFFSHQX1)0.170.28 &2.57 f
i_core_m/i_rosc_trim/shi_dat[1] (net)30.04
i_core_m/i_rosc_trim/U113/A (INVX2)0.170.00 &2.57 f
i_core_m/i_rosc_trim/U113/Y (INVX2)0.140.10 &2.68 r
i_core_m/i_rosc_trim/n46 (net)30.03
i_core_m/i_rosc_trim/U44/B0 (OAI22XL)0.140.00 &2.68 r
i_core_m/i_rosc_trim/U44/Y (OAI22XL)0.080.06 &2.74 f
i_core_m/i_rosc_trim/n108 (net)10.01
i_core_m/i_rosc_trim/shi_dat_reg_2_/D (DFFSHQX1)0.080.00 &2.74 f
data arrival time2.74
clock gen_xtal_src_tmp_x (rise edge)0.000.00
clock clk_xtal (source latency)0.000.00
uc_xtal_src/Y (BUFX4)0.000.000.00 r
xtal_src (net)10.01
i_core_m/i_clkmux/uc_xtal_src_tmp/B (MX2X4)0.000.00 &0.00 r
i_core_m/i_clkmux/uc_xtal_src_tmp/Y (MX2X4) (gclock source)0.150.25 &0.25 r
i_core_m/i_clkmux/xtal_src_tmp (net)10.03
i_core_m/i_clkmux/CLKINVX8G2B1I1_1/A (CLKINVX8)0.150.00 &0.25 r
i_core_m/i_clkmux/CLKINVX8G2B1I1_1/Y (CLKINVX8)0.400.24 &0.49 f
.........................
.........................
.........................
i_core_m/i_rosc_trim/CLKBUFX1G3B1I2/A (CLKBUFX1)0.220.00 &4.02 r
i_core_m/i_rosc_trim/CLKBUFX1G3B1I2/Y (CLKBUFX1)0.320.33 &4.36 r
i_core_m/i_rosc_trim/xtal_in_G3B1I2ASTHNet419 (net)30.02
i_core_m/i_rosc_trim/shi_dat_reg_2_/CK (DFFSHQX1)0.320.00 &4.36 r
library hold time-0.094.27
data required time4.27
----------------------------------------------------------------------------------------------
data required time4.27
data arrival time-2.74
----------------------------------------------------------------------------------------------
slack (VIOLATED)-1.53
这应该是正常的report啊。你可以将CRPR设为true，可能会少一些slack。你再report看看还有多大的slack。在修修就应该行了。set timing_removal_clock_reconvergence_pessimism true.
good experince sharing
thankyou verymuch
非常感谢大大的协助
依照指示 set timing_remove_clock_reconvergence_pessimism true
问题解决了 ^^
谢谢谢谢
学习了
再请教一下 physicssdu兄
如下所示
从CK -> Q -> D 这类型的report要下哪个指令来清除呢?
非常感谢
Startpoint: i_core_m/i_initial_proc/rosc_cali_ifr_reg_0_
(rising edge-triggered flip-flop clocked by gen_clk_iniproc_x)
Endpoint: i_core_m/i_initial_proc/rosc_cali_ifr_reg_0_
(rising edge-triggered flip-flop clocked by gen_clk_iniproc_rc)
Path Group: gen_clk_iniproc_rc
Path Type: min
PointFanoutCapTransIncrPath
-----------------------------------------------------------------------------------------------------
clock gen_clk_iniproc_x (rise edge)15.0015.00
clock source latency2.1717.17
i_core_m/i_clkmux/uc_clk_iniproc/Y (AND2X4)0.220.0017.17 r
i_core_m/i_clkmux/clk_iniproc (net)40.11
i_core_m/i_initial_proc/CLKBUFX8G7B1I4/A (CLKBUFX8)0.220.00 &17.18 r
i_core_m/i_initial_proc/CLKBUFX8G7B1I4/Y (CLKBUFX8)0.140.17 &17.35 r
i_core_m/i_initial_proc/clk_iniproc_G7B1I4ASTHNet713 (net)190.14
i_core_m/i_initial_proc/rosc_cali_ifr_reg_0_/CK (DFFRXL)0.140.00 &17.35 r
i_core_m/i_initial_proc/rosc_cali_ifr_reg_0_/Q (DFFRXL)0.140.48 &17.82 f
i_core_m/i_initial_proc/rosc_cali_ifr[0] (net)20.02
i_core_m/i_initial_proc/U220/A0N (OAI2BB2X1)0.140.00 &17.82 f
i_core_m/i_initial_proc/U220/Y (OAI2BB2X1)0.060.15 &17.97 f
i_core_m/i_initial_proc/n214 (net)10.01
i_core_m/i_initial_proc/rosc_cali_ifr_reg_0_/D (DFFRXL)0.060.00 &17.97 f
data arrival time17.97
clock gen_clk_iniproc_rc (rise edge)15.0015.00
clock source latency3.8418.84
i_core_m/i_clkmux/uc_clk_iniproc/Y (AND2X4)0.380.0018.84 r
i_core_m/i_clkmux/clk_iniproc (net)40.11
i_core_m/i_initial_proc/CLKBUFX8G7B1I4/A (CLKBUFX8)0.380.00 &18.84 r
i_core_m/i_initial_proc/CLKBUFX8G7B1I4/Y (CLKBUFX8)0.240.32 &19.16 r
i_core_m/i_initial_proc/clk_iniproc_G7B1I4ASTHNet713 (net)190.13
i_core_m/i_initial_proc/rosc_cali_ifr_reg_0_/CK (DFFRXL)0.240.00 &19.16 r
clock reconvergence pessimism0.0019.16
library hold time0.1419.30
data required time19.30
-----------------------------------------------------------------------------------------------------
data required time19.30
data arrival time-17.97
-----------------------------------------------------------------------------------------------------
slack (VIOLATED
学习了