warning:Out of 14406 SDF statements, 14406 had null values
我为了做modelsim的后仿，用的是ICC之后的网表，然后将抽出的spef文件用PT做时序分析进而产生出做仿真的sdf文件。
仿真时出现了如下警告：
# ** Warning: (vsim-SDF-3924) D:/zhuyl/simulation/201208/0823/test1/sdf_pt2.sdf: Out of 14406 SDF statements, 14406 had null values.
接着提示我SDF反标注成功，有如下提示
# ** Note: (vsim-3587) SDF Backannotation Successfully Completed.
#Time: 0 fsIteration: 0Region: /tb_topFile: D:/zhuyl/simulation/201208/0823/test1/tb_top.v
#Note : Cyclone II PLL is enabled
# Time: 0Instance: tb_top.top.pll.altpll_component.pll1
接着就出现了错误
# ** Error: D:/zhuyl/simulation/201208/0823/test1/csm18ic_neg.v(6521): $hold( posedge CK &&& (flag == 1):104 ns, negedge D:104 ns, 500 ps );
#Time: 104 nsIteration: 1Instance: /tb_top/top/netlist_in/calibration_temp8_reg_0_
#Note : Cyclone II PLL locked to incoming clock
# Time: 110000000Instance: tb_top.top.pll.altpll_component.pll1
# ** Error: D:/zhuyl/simulation/201208/0823/test1/csm18ic_neg.v(6521): $hold( posedge CK &&& (flag == 1):114 ns, negedge D:114 ns, 500 ps );
#Time: 114 nsIteration: 1Instance: /tb_top/top/netlist_in/calibration_temp9_reg_12_
# ** Error: D:/zhuyl/simulation/201208/0823/test1/csm18ic_neg.v(6521): $hold( posedge CK &&& (flag == 1):114 ns, negedge D:114 ns, 500 ps );
#Time: 114 nsIteration: 1Instance: /tb_top/top/netlist_in/calibration_temp9_reg_13_
波形就是红线
希望大家帮我看看什么原因，特别是不是那个顶头的警告有问题，谢谢！
看上去像是timing 不满足
最上边错误可以查看你的sdf文件，里边的timing信息都是一些三元组(min:typ:max)，如果三元组内缺少某列比如，typ没有。则就会像这样：
(DELAYFILE
(SDFVERSION "2.1")
(DESIGN "SReg99")
(DATE "Fri Jun5 15:23:10 2015")
(VENDOR "Cadence Design Systems, Inc.")
(PROGRAM "Encounter")
(VERSION "v13.20-p002_1 ((64bit) 09/30/2013 17:46 (Linux 2.6))")
(divIDER /)
(VOLTAGE 1.200000::1.200000)
(PROCESS "best:typical:worst")
(TEMPERATURE 27.000000::27.000000)
(TIMESCALE 1.0 ns)
(CELL
(CELLTYPE"SReg99")
(INSTANCE)
(DELAY
(ABSOLUTE
(INTERCONNECT FE_OFC3_preset/Z spShiftReg_reg\[5\]\[0\]/RN(0.0002::0.0002) (0.0003::0.0003))
(INTERCONNECT FE_OFC3_preset/Z spShiftReg_reg\[6\]\[0\]/RN(0.0002::0.0002) (0.0003::0.0003))
(INTERCONNECT FE_OFC3_preset/Z spShiftReg_reg\[7\]\[0\]/RN(0.0002::0.0002) (0.0003::0.0003))
(INTERCONNECT FE_OFC3_preset/Z spShiftReg_reg\[8\]\[0\]/RN(0.0000::0.0000) (0.0000::0.0001))
那么如果modelsim中后仿就会出warning。timing都已0处理。
你想办法重新generate SDF文件是王道。