减少 leakage power 方法

ICC user guide 里提到
using cells with a lower threshold-voltage for timing-critical paths and cells with a higher-threshold voltage for other paths can reduce the leakage power without violating the delay
又提到
One of the techniques to reduce the leakage power is to have higher-threshold voltage cells in the timing-critical path and lower-threshold voltage cells on the other paths.
到底是用 higher-threshold voltage cells 减少 leakage power 呢?
还是用 lower-threshold voltage cells 减少leakage power呢?

higher-threshold voltage cells

不是很明白。

igher-threshold voltage cells 减少 leakage powerv

iCC那个命令可以实现这个功能?

意思是说关键路径不用高阈值的cell，以满足时序。而非关键路径尽量用高阈值cell减少leakage。

又提到
One of the techniques to reduce the leakage power is to have higher-threshold voltage cells in the timing-critical path and lower-threshold voltage cells on the other paths.
这句话有问题啊哪里看到的呢?

可以这样理解，一个mos管 的Vgs 小于这个vth 时候有一个漏电流。这个就是vth 小的时候导致静态功耗大。