请教个关于pt上出现的violation问题

如题，本人菜鸟一枚，今年毕业才做后端，咳咳，昨天晚上才开始知道PT这东西，今天跑脚本的时候出现条路径violated
Startpoint: u_hresetn_sync/rst_sync2_n_reg
(rising edge-triggered flip-flop clocked by cts_96m_clk)
Endpoint: u_u0_nfc_clk480_rstn_gen/sync_rstn_reg_0_
(recovery check against rising-edge clock cts_480m_clk)
Path Group: **async_default**
Path Type: max
Min Clock Paths Derating Factor : 0.92
Max Clock Paths Derating Factor : 1.00
PointIncrPath
------------------------------------------------------------------------------
clock cts_96m_clk (rise edge)0.000.00
clock network delay (propagated)2.142.14
u_hresetn_sync/rst_sync2_n_reg/CK (LVT_DRNQUHDV3)0.002.14 r
u_hresetn_sync/rst_sync2_n_reg/Q (LVT_DRNQUHDV3)0.47 &2.61 r
u_hresetn_sync/c_6/Z (LVT_AO22UHDV6)0.62 &3.24 r
u_hresetn_sync/RSTOUTn (cm0_rst_sync_2)0.00 &3.24 r
c_66/ZN (LVT_INUHDV24)0.09 &3.32 f
c_43/ZN (LVT_NOR2UHDV2)0.35 &3.67 r
u_u0_nfc_clk480_rstn_gen/rstn_in (rstn_sync_5)0.00 &3.67 r
u_u0_nfc_clk480_rstn_gen/c_3/Z (LVT_OA22UHDV2)0.24 &3.91 r
u_u0_nfc_clk480_rstn_gen/sync_rstn_reg_0_/RDN (LVT_DRNQUHDV2)
0.00 &3.91 r
data arrival time3.91
clock cts_480m_clk (rise edge)3.543.54
clock network delay (propagated)0.253.79
clock reconvergence pessimism0.003.79
u_u0_nfc_clk480_rstn_gen/sync_rstn_reg_0_/CK (LVT_DRNQUHDV2)3.79 r
library recovery time0.093.88
data required time3.88
------------------------------------------------------------------------------
data required time3.88
data arrival time-3.91
------------------------------------------------------------------------------
slack (VIOLATED)-0.04

请教下
u_hresetn_sync/rst_sync2_n_reg/Q (LVT_DRNQUHDV3)0.47 &2.61 r
u_hresetn_sync/c_6/Z (LVT_AO22UHDV6)0.62 &3.24 r

这个地方可以修掉么?应该怎么解决这个问题呢！
大神们回复的时候，尽量详细点哈，我这没啥基础滴呢，谢谢啦！

检查一下为什么会出现这么大的cell delay， 看看input transition, output load 的情况

好滴 3Q

我也是菜鸟，只是说说我的想法吧，可能不对，还望谅解和指正！
您的data required time计算中有个感觉这个不应该是0吧，这样很悲观，你有没有设置set timing_remove_clock_reconvergence_pessimism true?
还有您自己说的这两个cell的延时很大
u_hresetn_sync/rst_sync2_n_reg/Q (LVT_DRNQUHDV3)0.47 &2.61 r
u_hresetn_sync/c_6/Z (LVT_AO22UHDV6)0.62 &3.24 r
看看有没有同类延时小一点的单元替换一下?