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ISSCC 2018 Program(论文清单)

时间:12-12 整理:3721RD 点击:
http://submissions.mirasmart.com/ISSCC2018/PDF/ISSCC2018AdvanceProgram.pdf

含China:16篇。其中澳门大学7篇,北京大学1篇,香港科技大学2篇,复旦大学2篇,
电子科技大学3篇(1篇与澳门大学合作,1篇与台湾清华大学合作),ADI(北京/上海)1篇,
浙江大学1篇(与韩国KAIST合作)
3.2  A Regulation-Free Sub-0.5V 16/24MHz Crystal Oscillator for Energy-
Harvesting   BLE   Radios   with   14.2nJ   Startup   Energy   and   31.8μW
Steady-State Power
K-M. Lei1, P-I. Mak1, M-K. Law1, R. P. Martins1,2,
1 University of Macau, Macau, China
2 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal
6.7  A 32Gb/s 133mW PAM-4 Transceiver with DFE Based on Adaptive Clock
Phase and Threshold Voltage in 65nm CMOS
L. Tang, W. Gai, L. Shi, X. Xiang, K. Sheng, A. He,
Peking University, Beijing, China
7.1  A 0.0056mm2 All-Digital MDLL Using Edge Re-Extraction, Dual-Ring
VCOs and a 0.3mW Block-Sharing Frequency Tracking Loop Achieving
292fsrms Jitter and -249dB FOM
S. Yang1, J. Yin1, P-I. Mak1, R. P. Martins1,2,
1 University of Macau, Macau, China
2 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal
8.3   A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-
Device Charging with 78.1% Total Efficiency
F. Mao1, Y. Lu1, S-P. U1,2, R. P. Martins1,3,
1 University of Macau, Macau, China
2 Synopsys Macau, Macau, China;
3 Instituto Superior Técnico/Universidade de Lisboa, Lisbon, Portugal
8.4   A 13.56MHz Wireless Power and Data Transfer Receiver Achieving 75.4% Effective-Power-
Conversion Efficiency with 0.1% ASK Modulation Depth and 9.2mW Output Power
Y. Wang1, D. Ye1, L. Lyu1, Y. Xiang1, H. Min1, C-J. R. Shi1,2
1 Fudan University, Shanghai, China;
2 University of Washington, Seattle, WA
15.8 An 82-to-108GHz -181dB-FOMT ADPLL Employing a DCO with Split-
Transformer   and   Dual-Path   Switched-Capacitor   Ladder   and   a
Clock-Skew-Sampling Delta-Sigma TDC
Z. Huang, H. C. Luong,
HKUST, Hong Kong, China
17.4  A 0.28mΩ-Sensitivity 105dB-Dynamic-Range Electrochemical Impedance
Spectroscopy SoC for Electrochemical Gas Detection
G. Qu1, H. Wang1, Y. Zhao1, J. O'Donnell2, C. Lyden3, Y. Liu1, J. Ding4,
D. Dempsey2, L. Chen1,D. Bourke3, S. Gu1, J. Gao1, L. Lu1, L. Wang1, X. Li1,
H. Li5, C. Chu1, L. Yang1
1 Analog Devices, Beijing, China;
2 Analog Devices, Limerick, Ireland
3 Analog Devices, Cork, Ireland;
4 Analog Devices, Shanghai, China
5 Analog Devices, Wilmington, MA
18.4  A 0.4V 430nA Quiescent Current NMOS Digital LDO with NAND-Based
Analog-Assisted Loop in 28nm CMOS
X. Ma1,2, Y. Lu1, R. P. Martins1,3, Q. Li2,
1 University of Macau, Macau, China
2 University of Electronic Science and Technology of China, Chengdu, China
3 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal
18.6  A 500mA Analog-Assisted Digital-LDO-Based On-Chip Distributed Power
Delivery Grid with Cooperative Regulation and IR-Drop Reduction in 65nm CMOS
Y. Lu1, F. Yang2, F. Chen1, P. K. T. Mok1,
1 HKUST, Hong Kong, China;
2 Qualcomm, Singapore
23.3 A   22.8-to-43.2GHz   Tuning-Less   Injection-Locked   Frequency   Tripler
Using   Injection-Current   Boosting   with   76.4%   Locking   Range   for
Multiband 5G Applications
J. Zhang, H. Liu, C. Zhao, K. Kang
University of Electronic Science and Technology of China, Chengdu, China
23.5 An   Inverse-Class-F   CMOS   VCO   with   Intrinsic-High-Q   1st
-   and   2nd-Harmonic   Resonances   for   1/f2-to-1/f3 Phase-Noise   Suppression Achieving 196.2dBc/Hz FOM
C-C. Lim1,2, J. Yin1, P-I. Mak1, H. Ramiah2, R. P. Martins1,3
1 University of Macau, Macau, China;
2 University of Malaya, Kuala Lumpur, Malaysia
3 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal
26.5 A Compact Dual-Band Digital Doherty Power Amplifier Using Parallel-
Combining Transformer for Cellular NB-IoT Applications
Y. Yin, L. Xiong, Y. Zhu, B. Chen, H. Min, H. Xu,
Fudan University, Shanghai, China
27.1  A 0.22-to-2.4V-Input Fine-Grained Fully Integrated Rational Buck-Boost SC
DC-DC Converter Using Algorithmic Voltage-Feed-In (AVFI) Topology Achieving
84.1% Peak Efficiency at 13.2mW/mm2
Y. Jiang1, M-K. Law1, P-I. Mak1, R. P. Martins1,2,
1 University of Macau, Macau, China
2 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal
27.5  A 95.2% Efficiency Dual-Path DC-DC Step-Up Converter with Continuous
Output Current Delivery and Low Voltage Ripple
S-U. Shin1, Y. Huh1, Y. Ju1, S. Choi1, C. Shin1, Y-J. Woo1, M. Choi1, S-H. Park1
Y-H. Sohn1, M-W. Ko1, Y. Jo1, H. Han1, H-M. Lee2, S-W. Hong3, W. Qu4, G-H. Cho1
1 KAIST, Daejeon, Korea
2 Korea University, Seoul, Korea;
3 Sookmyung Women’s University, Seoul, Korea
4 Zhejiang University,Hangzhou, China
28.5  A 0.2V Energy-Harvesting BLE Transmitter with a Micropower Manager
Achieving 25% System Efficiency at 0dBm Output and 5.2nW Sleep Power
in 28nm CMOS
J. Yin1, S. Yang1, H. Yi1, W-H. Yu1, P-I. Mak1, R. P. Martins1,2,
1 University of Macau, Macau, China
2 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal
31.5 A 65nm 4Kb Algorithm-Dependent Computing-in-Memory SRAM Unit-
Macro     with     2.3ns     and     55.8TOPS/W     Fully     Parallel
Product-Sum Operation for Binary DNN Edge Processors
W-S. Khwa1,2, J-J. Chen1, J-F. Li1, X. Si3, E-Y. Yang1, X. Sun4, R. Liu4,
P-Y. Chen4, Q. Li3, S. Yu4, M-F. Chang1,
1 National Tsing Hua University, Hsinchu, Taiwan
2 TSMC, Hsinchu, Taiwan
3 University of Electronic Science and Technology of China, Sichuan, China
4 Arizona State University, Tempe, AZ

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