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Senior Physical Design Engineer-Shanghai

时间:12-12 整理:3721RD 点击:
Physical Design Engineer
Department: SNDS
Primary Location :  Shanghai Pudong
Job: Engineering - Hardware
欢迎投递简历到xpzhang@marvell.com
Description
o    Implementing from Synthesis to GDSII that includes synthesis/DFT implement and check/P&R/ timing signoff and physical signoff
o    Cooperate with colleagues on power fixing based on power analysis result
o    Develop methodologies to make daily work more efficient
o    Cooperate with designers on RTL issues which relative to backend timing closure and congestion solve.
o    Debugging the flow and completion it.

Qualifications
o    BS/MS+ in EE/CS required
o    Have DRC/LVS/ERC/Antenna debugging skills
o    Knows Synopsys /Cadence place-and-route tool set and physical design project implementation.
o    Good programming skill.
o    Capable of writing Tcl or Perl.
o    Familiar with synthesis, static timing analysis is an advantage.
o    Familiar with RTL Design in Verilog is an advantage..
o    Self-motivated team worker, good verbal and written communication skills in English.
o    Two years relative work experiences are preferred.

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