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Muliti-Core Design Integration Sr. Manager-北京岗位

时间:12-12 整理:3721RD 点击:
有兴趣请发简历到hamy@hibohr.com,或者加微信 13512136297 及时沟通,谢谢
Minimum Qualifications        
8+ years of experience in ASIC/SoC Design and Integration
Leading large complex Core Integration Design Teams
Strong domain knowledge of bus system
Experience in Logic Design, Verilog, synthesis, LINT and static timing analysis, clock domain crossing techniques/implementation
Strong fundamental knowledge of high performance processors and large complex bus system
Solid background in scripting for automation of design methodologies & flows
Detail oriented with strong organizational, problem solving, and communication skills (both written and oral)
Strong understanding of core integration procedures, methodologies & flows
Ability to work in a team environment
Preferred Qualifications        
Direct and relevant experience with multi-CPU core solutions ARMv8 processor architecture Bus Protocol experience for the following: Coherent Interconnects, AHB, AXI, CHI, CHIE…
Education Requirements        
Required: Bachelor's, Electrical Engineering with 10+ years of experience and Masters with 8+ years of experience

噢,CHIE……

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