ASIC design for SoC ? ASIC design for WiFi SoC ? Participat
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ASIC design for SoC
? ASIC design for WiFi SoC
? Participate in development of micro architecture specification and RTL implementation of digital blocks. Responsible for all phases of design including design, verification, synthesis, timing closure, power estimation, and DFT.
? Work closely with the USA teams
? Support chip tapeout and bring up
Requirements:
? At least 5 years ASIC design experience
? BS in Electrical Engineering (or equivalent) , MSEE is desired.
? Familiar with Verilog and System Verilog.
? Design experience with 802.11ac or 802.11n Wireless MAC.
? Design experience in DMA, CPU, PCIE, USB, Gigabit Ethernet, switch, bus protocol AXI, AHB.
? Working knowledge of networking protocols such as TCP/IP, 802.3, 802.11 a plus.
? Experience with Medium Access protocols a plus.
? Familiar with lint, CDC, formal verification methodologies.
? Understanding of basic DFT concepts.
? Hands on experience with synthesis and STA.
? FPGA emulation experience a plus
? Good communication and problem solving skills.
? Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging
ASIC设计 简历发 hr@hi-talent.com
?WiFi SoC ASIC设计
?参与微架构规范和数字模块的RTL实现发展。负责设计包括设计,验证,综合,所有阶段的定时关闭,功率估计,和DFT。
?与美国队紧密合作
?支持芯片的流片和造就
要求:
?至少5年以上ASIC设计经验
?电机工程学士(或同等学历),硕士是需要的。
?熟悉Verilog和System Verilog。
?设计经验与802.11ac或802.11n无线MAC。
?在DMA,设计经验的CPU、PCIE、USB、千兆以太网、开关、总线协议AXI、AHB。
?如TCP/IP网络协议的工作知识,802.3,802.11个加。
?有媒体访问协议经验者优先。
?熟悉毛,疾病预防控制中心,形式验证方法。
?基本理论概念的理解。
?对合成和STA的经验。
?FPGA仿真经验者优先
?良好的沟通和解决问题的能力。
?芯片带来的经验,包括使用逻辑分析仪和示波器进行调试
SOC and Switch verification
1 SOC and Switch verification
2 Work closely with the USA teams
3 Support chip tape out and bring up
Requirements:
1 5+ years experience in ASIC Verification.
2 BS in Electrical Engineering (or equivalent) is a must have, MSEE is desired.
3 Working knowledge of networking protocols such as 802.3 and TCP/IP
4 Experience with switch engine verification.
5 System on Chip (SOC) Verification Experience, including AHB/AXI, CPU, Interface integration verification.
6 Experience verifying interfaces such as PCIe, Ethernet, DDR and USB.
7 Verification tool experience – Verilog, System-Verilog, Coverage Analysis.
8 Must be familiar with various scripting languages used in verification, including Perl, Csh, Make, etc.
9 Working knowledge of C programming language.
10 Must be expert in Verilog RTL language.
11 Must be familiar with the ASIC verification flow from feature identification to testbench development and through final tapeout sign-off.
12 FPGA emulation experience a plus.
13 Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging
芯片和Switch验证 简历发 hr@hi-talent.com
1芯片和开关验证
2与美国团队紧密合作
3支持芯片带出并提出
要求:
1 5年以上ASIC验证的经验。
电气工程2学士学位(或同等学历)是必须的,硕士是需要的。
如802.3和TCP / IP网络协议3的工作知识
4有开关发动机验证经验。
5片上系统(SOC)的验证经验,包括AHB /阿希、CPU、接口集成验证。
6经验验证接口,如PCIe、以太网和USB,DDR。
7验证工具的经验–Verilog,System Verilog,覆盖分析。
8必须熟悉各种脚本语言用于验证,如Perl、CSH、制作,等。
9编程语言的工作知识。
10必须在Verilog RTL语言专家。
11必须熟悉特征识别测试平台开发的ASIC验证流程,通过最后的流片签字。
12 FPGA仿真经验者优先。
13芯片带来的经验,包括使用逻辑分析仪和示波器进行调试
Wireless MAC verification
The Role:
1 Wireless MAC verification
2 Work closely with the USA teams
3 Support chip tape out and bring up
Requirements:
1 5+ years experience in ASIC Verification.
2 BS in Electrical Engineering (or equivalent) is a have, MSEE is desired.
3 Working knowledge of networking protocols such as 802.11, 802.3 and TCP/IP.
4 Working experience with Medium Access protocols.
5 Verification tool experience – Verilog, System-Verilog, Coverage Analysis.
6 Must be familiar with various scripting languages used in verification, including Perl, Csh, Make, etc.
7 Experience verifying interfaces such as PCIe, Ethernet, DDR, USB a plus.
8 Working knowledge of C programming language.
9 Must be expert in Verilog RTL language.
10 Must be familiar with the ASIC verification flow from feature identification to testbench development and through final tapeout sign-off.
11 FPGA emulation experience a plus.
12 Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging
无线MAC验证 简历发 hr@hi-talent.com
角色:
1无线网络验证
2与美国团队紧密合作
3支持芯片带出并提出
要求:
1 5年以上ASIC验证的经验。
电气工程2学士学位(或同等学历)是一个有理想,硕士。
如802.11网络协议的3个工作的知识,802.3和TCP / IP。
4工作经验中的介质访问协议。
5验证工具的经验–Verilog,System Verilog,覆盖分析。
6必须熟悉各种脚本语言用于验证,如Perl、CSH、制作,等。
7经验验证接口,如PCIe、以太网、DDR、USB Plus。
8编程语言的工作知识。
9必须在Verilog RTL语言专家。
10必须熟悉特征识别测试平台开发的ASIC验证流程,通过最后的流片签字。
11 FPGA仿真经验者优先。
12芯片带来的经验,包括使用逻辑分析仪和示波器进行调试
? ASIC design for WiFi SoC
? Participate in development of micro architecture specification and RTL implementation of digital blocks. Responsible for all phases of design including design, verification, synthesis, timing closure, power estimation, and DFT.
? Work closely with the USA teams
? Support chip tapeout and bring up
Requirements:
? At least 5 years ASIC design experience
? BS in Electrical Engineering (or equivalent) , MSEE is desired.
? Familiar with Verilog and System Verilog.
? Design experience with 802.11ac or 802.11n Wireless MAC.
? Design experience in DMA, CPU, PCIE, USB, Gigabit Ethernet, switch, bus protocol AXI, AHB.
? Working knowledge of networking protocols such as TCP/IP, 802.3, 802.11 a plus.
? Experience with Medium Access protocols a plus.
? Familiar with lint, CDC, formal verification methodologies.
? Understanding of basic DFT concepts.
? Hands on experience with synthesis and STA.
? FPGA emulation experience a plus
? Good communication and problem solving skills.
? Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging
ASIC设计 简历发 hr@hi-talent.com
?WiFi SoC ASIC设计
?参与微架构规范和数字模块的RTL实现发展。负责设计包括设计,验证,综合,所有阶段的定时关闭,功率估计,和DFT。
?与美国队紧密合作
?支持芯片的流片和造就
要求:
?至少5年以上ASIC设计经验
?电机工程学士(或同等学历),硕士是需要的。
?熟悉Verilog和System Verilog。
?设计经验与802.11ac或802.11n无线MAC。
?在DMA,设计经验的CPU、PCIE、USB、千兆以太网、开关、总线协议AXI、AHB。
?如TCP/IP网络协议的工作知识,802.3,802.11个加。
?有媒体访问协议经验者优先。
?熟悉毛,疾病预防控制中心,形式验证方法。
?基本理论概念的理解。
?对合成和STA的经验。
?FPGA仿真经验者优先
?良好的沟通和解决问题的能力。
?芯片带来的经验,包括使用逻辑分析仪和示波器进行调试
SOC and Switch verification
1 SOC and Switch verification
2 Work closely with the USA teams
3 Support chip tape out and bring up
Requirements:
1 5+ years experience in ASIC Verification.
2 BS in Electrical Engineering (or equivalent) is a must have, MSEE is desired.
3 Working knowledge of networking protocols such as 802.3 and TCP/IP
4 Experience with switch engine verification.
5 System on Chip (SOC) Verification Experience, including AHB/AXI, CPU, Interface integration verification.
6 Experience verifying interfaces such as PCIe, Ethernet, DDR and USB.
7 Verification tool experience – Verilog, System-Verilog, Coverage Analysis.
8 Must be familiar with various scripting languages used in verification, including Perl, Csh, Make, etc.
9 Working knowledge of C programming language.
10 Must be expert in Verilog RTL language.
11 Must be familiar with the ASIC verification flow from feature identification to testbench development and through final tapeout sign-off.
12 FPGA emulation experience a plus.
13 Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging
芯片和Switch验证 简历发 hr@hi-talent.com
1芯片和开关验证
2与美国团队紧密合作
3支持芯片带出并提出
要求:
1 5年以上ASIC验证的经验。
电气工程2学士学位(或同等学历)是必须的,硕士是需要的。
如802.3和TCP / IP网络协议3的工作知识
4有开关发动机验证经验。
5片上系统(SOC)的验证经验,包括AHB /阿希、CPU、接口集成验证。
6经验验证接口,如PCIe、以太网和USB,DDR。
7验证工具的经验–Verilog,System Verilog,覆盖分析。
8必须熟悉各种脚本语言用于验证,如Perl、CSH、制作,等。
9编程语言的工作知识。
10必须在Verilog RTL语言专家。
11必须熟悉特征识别测试平台开发的ASIC验证流程,通过最后的流片签字。
12 FPGA仿真经验者优先。
13芯片带来的经验,包括使用逻辑分析仪和示波器进行调试
Wireless MAC verification
The Role:
1 Wireless MAC verification
2 Work closely with the USA teams
3 Support chip tape out and bring up
Requirements:
1 5+ years experience in ASIC Verification.
2 BS in Electrical Engineering (or equivalent) is a have, MSEE is desired.
3 Working knowledge of networking protocols such as 802.11, 802.3 and TCP/IP.
4 Working experience with Medium Access protocols.
5 Verification tool experience – Verilog, System-Verilog, Coverage Analysis.
6 Must be familiar with various scripting languages used in verification, including Perl, Csh, Make, etc.
7 Experience verifying interfaces such as PCIe, Ethernet, DDR, USB a plus.
8 Working knowledge of C programming language.
9 Must be expert in Verilog RTL language.
10 Must be familiar with the ASIC verification flow from feature identification to testbench development and through final tapeout sign-off.
11 FPGA emulation experience a plus.
12 Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging
无线MAC验证 简历发 hr@hi-talent.com
角色:
1无线网络验证
2与美国团队紧密合作
3支持芯片带出并提出
要求:
1 5年以上ASIC验证的经验。
电气工程2学士学位(或同等学历)是一个有理想,硕士。
如802.11网络协议的3个工作的知识,802.3和TCP / IP。
4工作经验中的介质访问协议。
5验证工具的经验–Verilog,System Verilog,覆盖分析。
6必须熟悉各种脚本语言用于验证,如Perl、CSH、制作,等。
7经验验证接口,如PCIe、以太网、DDR、USB Plus。
8编程语言的工作知识。
9必须在Verilog RTL语言专家。
10必须熟悉特征识别测试平台开发的ASIC验证流程,通过最后的流片签字。
11 FPGA仿真经验者优先。
12芯片带来的经验,包括使用逻辑分析仪和示波器进行调试