Position: (Senior) FPGA Engineer 简历发 boss@hi-talent.com
时间：12-12
整理：3721RD
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Position: (Senior) FPGA Engineer 简历发 boss@hi-talent.com 微信 xinde_jane
Responsibilities:
1.FPGA design and verification. Porting ASIC code to FPGA platform, verify the whole design in FPGA system.
2.Lead the whole FPGA verification flow, include specification, coding, simulation, physical implementation and board level debugging.
3.Organize and Coordinate the work of debug team.
4.Capability of making rapidly scheme/method to trace issue.
5.RTL module development to assist the verification on FPGA
Requirement：
1.BS with more than 5 years or MS with more than 3 years in Electronic or Computer Science Engineering is required. Expert in FPGA operation theory.
2.More than 3 years experience in design and verify on FPGA.
3.Understanding of RTL (preferably Verilog) and strong digital knowledge
4.In-depth knowledge of FPGA synthesis and PAR tools (preferably Synplify ,Xilinx ISE and Vivado), knowledge with certify a plus
5.knowledge of Verilog/System-Verilog is required; UVM is a plus
6.Knowledge on Perl , Unix/Linux Shell a plus
7.Used to a collaborative working environment(source version control tools, bug tracking system) a plus
8.Experience with ARM, 8051 embedded processors
9.Enjoys lab work using test/measurement equipments (logic analyzer, oscilloscope, in-circuit emulator)
10.Strong trouble shooting and analytical skills desired
11.Highly motivated, fast learner, team player with good oral/written Chinese/English communication skills
12. Knowledge on HAPS,CHIPIT platform, cosim/coemu a plus
Responsibilities:
1.FPGA design and verification. Porting ASIC code to FPGA platform, verify the whole design in FPGA system.
2.Lead the whole FPGA verification flow, include specification, coding, simulation, physical implementation and board level debugging.
3.Organize and Coordinate the work of debug team.
4.Capability of making rapidly scheme/method to trace issue.
5.RTL module development to assist the verification on FPGA
Requirement：
1.BS with more than 5 years or MS with more than 3 years in Electronic or Computer Science Engineering is required. Expert in FPGA operation theory.
2.More than 3 years experience in design and verify on FPGA.
3.Understanding of RTL (preferably Verilog) and strong digital knowledge
4.In-depth knowledge of FPGA synthesis and PAR tools (preferably Synplify ,Xilinx ISE and Vivado), knowledge with certify a plus
5.knowledge of Verilog/System-Verilog is required; UVM is a plus
6.Knowledge on Perl , Unix/Linux Shell a plus
7.Used to a collaborative working environment(source version control tools, bug tracking system) a plus
8.Experience with ARM, 8051 embedded processors
9.Enjoys lab work using test/measurement equipments (logic analyzer, oscilloscope, in-circuit emulator)
10.Strong trouble shooting and analytical skills desired
11.Highly motivated, fast learner, team player with good oral/written Chinese/English communication skills
12. Knowledge on HAPS,CHIPIT platform, cosim/coemu a plus
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