Cadence深圳招 Principal Application Engineer-数字前端
时间:12-12
整理:3721RD
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Principal Application Engineer-深圳
Position Description:
1. The SoC Design and verification Engineer works with key customers to understand their design and verification challenges, collaborate with the R&D organization to ensure that the solution addresses the customer’s real needs.
2. This position requires problem discovery and analysis at customer site, assessment of possible solutions, collaborating with RnD and customer to test the solution, and manage the deployment at the customer site.
3. In this role, the Engineer will work both independently and collaborate with R&D and Asia Pacific team members to address customer issues and to coordinate and facilitate customer service/product change requests. The person should be able to act as strong team member and contributor, leading team projects and initiatives.
4. The Engineer will provide technical support in multiple design & verification solutions:
oHW simulation-acceleration and emulation
oSW/HW co-debug and embedded software debug
oOperation System (OS) inter-operation for mobile
oSoC design & verification methodology and techniques: interconnect, performance analysis
Position Requirements:
1. The candidate should possess minimum a Bachelors technical degree and 5 years of industry experience
- Minimum 5 years hands-on, expertise on SoC based design & verification techniques.
- Expertise in SoC SW design and verification and embedded system application, with iOS/Android system knowledge is a big plus
- Hands on Verification experience using SystemVerilog/e/SystemC is a plus
2. The candidate must be able to communicate R&D and have passion to make customers successful
- Highly organized individual with demonstrated ability to handle multi-task activities and projects
- Passionate about adopting and promoting new technologies and making customers successful
- Good communication skills
- English fluency is a must, other language speaking is a plus
3. Experience to lead projects will be strongly taken into consideration
Principal Application Engineer-深圳
Position Description:
1. The SoC Design and verification Engineer works with key customers to understand their design and verification challenges, collaborate with the R&D organization to ensure that the solution addresses the customer’s real needs.
2. This position requires problem discovery and analysis at customer site, assessment of possible solutions, collaborating with RnD and customer to test the solution, and manage the deployment at the customer site.
3. In this role, the Engineer will work both independently and collaborate with R&D and Asia Pacific team members to address customer issues and to coordinate and facilitate customer service/product change requests. The person should be able to act as strong team member and contributor, leading team projects and initiatives.
4. The Engineer will provide technical support in multiple design & verification solutions:
oHW simulation-acceleration and emulation
oSW/HW co-debug and embedded software debug
oOperation System (OS) inter-operation for mobile
oSoC design & verification methodology and techniques: interconnect, performance analysis
Position Requirements:
1. The candidate should possess minimum a Bachelors technical degree and 5 years of industry experience
- Minimum 5 years hands-on, expertise on SoC based design & verification techniques.
- Expertise in SoC SW design and verification and embedded system application, with iOS/Android system knowledge is a big plus
- Hands on Verification experience using SystemVerilog/e/SystemC is a plus
2. The candidate must be able to communicate R&D and have passion to make customers successful
- Highly organized individual with demonstrated ability to handle multi-task activities and projects
- Passionate about adopting and promoting new technologies and making customers successful
- Good communication skills
- English fluency is a must, other language speaking is a plus
3. Experience to lead projects will be strongly taken into consideration