大量职位虚席以待（北京/上海/苏州/台北/新竹
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AMD铸就无数经典
加入我们
与AMD携手谱写美好明天
北京、上海、苏州、台北、新竹
热门职位等你来！
有意向者欢迎发送简历至yao.li@amd.com。
所有职位均可投递全职或实习。
实习时间要求：
6个月以上
Location: Shanghai
1. Sr./MTS ASIC Verification Engineer
Core Qualification Required
1. Excellent knowledge of design verification methodology, such as OVM/UVM, systemverilog
2.Solid experiences with simulation model creation and the testbench build
3.C/C++ software development experiences is a plus
2 Senior/MTS AISC Design Engineer
Core Qualification Required
1. Master with 2+ (or Bachelor with 4+) years working experience in ASIC area
2.Micro-processor (e.g. ARM) architecture and peripheral; Popular on-chip bus (AMBA/AXI) or NOC; low power design and verification methodology; Standard IO IPs, including SPI/SMBUS/GPIO/I2C/I2S/UART; DFT/JTAG, etc.
3. Knowledge on synthesis, timing analysis, CDC and formal verification
3 Senior/MTS DFT Engineer
Core Qualification Required
1. Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.
2. Perform verification on all DFT structures
3. Generate DFT related timing constraints and work with PD team for timing closure
4 Senior/MTS Physical Design Engineer
Core Qualification Required
1. MSEE with 6+ years or Bachelor with 8+ years of industrial experience in ASIC design
2. 5+ years or more years of experience in physical design of deep submicron digital ASIC chips
3. Hands on experience in large scale ASIC chip physical design
5 Senior/MTS ASIC Design Verification engineer (Graphics Performance verification)
Core Qualification Required
1. Expert of Verilog RTL design and experience of large digital ASIC project.
2. Familiar with front-end EDA tools and flows.
3. Familiar with C/C++ programming and unix/linux and scripts
6 MTS ASIC Design Verification engineer (Graphics performance Analysis & Architecture Medeling)
Core Qualification Required
1. 3 + year experience on C\C++
2. Plus with 3+ years’ OpenGL/D3D programming/ driver experience; 2+ years' Linux/Shell/perl/python
3. Plus with experience on CPU/GPU Design/Verification
7 Senior/MTS ASIC design/Front-End Engineer – Graphics
Core Qualification Required
1. MS degree of EE with 5+ years working experience in ASIC Company.
2. Expert of Verilog RTL design and has experience of large digital ASIC project.
3.Familiar with front-end EDA tools and flows; C/C++ programming and unix/linux and scripts (tcl, perl etc.)
8 Sr./MTS ASIC Design Verification Engineer (Graphics IP)
Core Qualification Required
1. Familiar with Linux Environment (including shell scripting and linux gnu tools)
2. Experience with design for verification (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)
3.Should be versatile in any one of the high level verification flow such as SV,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verification
9 Sr./MTS ASIC Design Verification Engineer (3D Graphics)
Core Qualification Required
1. Requires demonstrated technical expertise in functional verification of complex designs including: test planning, test bench development, stimulus generation, checking, and functional coverage.
2. Significant experience with Verilog, C/C++, Perl, and logic simulation is a requirement.
3. xperience with SystemVerilog/OVM is an optional.
10 MTS/Sr.ASIC Design Verification engineer (Multimedia)
Core Qualification Required
1. Strong RTL coding and familiar with front-end design flow
2. Experience on synthesis, timing analysis and formal verification.
3. Experience of display specific-interconnection protocols is a plus
11 MTS / Sr. Software Development Engineer / NCG(应届生) for Graphics driver and game engine development
Core Qualification Required
1. Highly-skilled software designer and engineer, strong in 3D math,
2. Fluent in C and C++ and the efficient use of discrete GPUs, APUs, and CPUs
3. Fluent in C and C++ and the efficient use of discrete GPUs, APUs, and CPUs
12 Sr. SoftwareDevelopment Engineer / NCG(应届生)-OpenGL
Core Qualification Required
1. Strong expertise in computer architecture, datastructure and algorightms
2. Rich and strong experience in C/C++ programming (5 years experience for MTSapplicants); Solid knowledge in Computer Graphics,understand GPU graphicspipeline,shader system
3. Familiarity with ARM/Android platform,Direct3D and compiler technology is adesired plus
13 Sr. MultimediaDriver/Firmware Engineer
Core Qualification Required
1. Understanding of X86 architecture, be familiar withvideo processing like Encode/Decode etc
2. Strong knowledge and past experience on video codecs, such as MPEG-1,MPEG-2, H.264 and H.265 is required
3. Experience and skills on user mode driver debugging and development isrequired
14 Sr./MTS. BIOSEngineer
Core Qualification Required
1. MTS candidate: BS-CS/BS-EE with at least 7 yearsexperience or 5+ years experience for MS with BIOS, firmware, or systemsoftware development
2. Sr. engineer candidate: BS-CS/BS-EE with at least 5 years experience or 3+years experience for MS with BIOS, firmware, or system software development
3. Strong Knowledge about ACPI, USB, PCIE, SATA and other PC industry standard
15 Sr. ASIC Design Engineer – Display (Multimedia)
Core Qualification Required
1. Familiar with Linux Environment (including shell scripting and linux gnu tools)
2. Good at C/C++, Perl, Makefile, familiar with Ruby, SystemVerilog, SystemC is a plus
3. Familiar with RTL coding and front-end design flow
16 Trade compliance manager(Great China)
Core Qualification Required
1. Knowledge of US export administration regulations, semiconductor and encryption licensing a plus.
2. Experience with management of VEU or Site licenses a plus
3. Knowledge and experience with US export controls as well as the export/customs regulations of Singapore, Hong Kong and Malaysia
Location: Beijing
1 Sr./MTS ASIC Verification Engineer
Core Qualification Required
1. Experience in one or more of following areas: micro-processor system, on-chip interconnection (AXI, NOC), low power design and verification, DFT, security, etc. is must
2. Excellent knowledge and experience of UVM/OVM verification methodology at both sub-IP and SoC levels.
3. Good team player to drive and to lead a task from scratch to closure.
2 Sr./MTS DFT Scan Engineer
Core Qualification Required
1. Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.
2. Perform verification on all DFT structures
3. Generate DFT related timing constraints and work with PD team for timing closure
3 Senior/MTS Physical Design Engineer
Core Qualification Required
1. MSEE with 6+ years or Bachelor with 8+ years of industrial experience in ASIC design
2. 5+ years or more years of experience in physical design of deep submicron digital ASIC chips
3. Hands on experience in large scale ASIC chip physical design
4 Sr. ASIC Design Engineer – Display (Multimedia)
Core Qualification Required
1. Familiar with Linux Environment (including shell scripting and linux gnu tools)
2. Good at C/C++, Perl, Makefile, familiar with Ruby, SystemVerilog, SystemC is a plus
3. Familiar with RTL coding and front-end design flow
Location: Taipei
1 SMTS Application Engineer_Image Signal Processor (ISP)
Core Qualification Required
1. Solid knowledge in optical system, imaging and image quality
2. At least six years of prior experience with image quality evaluation, camera systems development, and imaging tuning is required.
3. Strong C/C++ and Matlab programming skills.
Location: HsinChu
1 Sect. Manager Prod. Planning & Control
Core Qualification Required
1. Bachelor degree or above in business/material management or industry engineering.
2. 8-10 years’ experience in semiconductor manufacturing production planning under supply chain organization.
3. Experience in outsourcing/OSAT management
4. Influencing across functions & regions with strong interpersonal , communication and leadership skills
Location: Suzhou
1 Sr. Product Development Engineer (For FA&REL)
Core Qualification Required
1. Bachelor or above degrees in microelectronics, material, EE, physics and semiconductor etc, total 5 – 8 years working experience
2. Hands-on experience on electrical and physical failure analysis including fault isolation and defect characterization via curve trace, SEM/EDX/FIB, CSAM, X-ray, polisher, cross-section, EMMI/OBIRCH etc
3.Good skills in report and document writing and presentation
期待你的加入！
AMD铸就无数经典
加入我们
与AMD携手谱写美好明天
北京、上海、苏州、台北、新竹
热门职位等你来！
有意向者欢迎发送简历至yao.li@amd.com。
所有职位均可投递全职或实习。
实习时间要求：
6个月以上
Location: Shanghai
1. Sr./MTS ASIC Verification Engineer
Core Qualification Required
1. Excellent knowledge of design verification methodology, such as OVM/UVM, systemverilog
2.Solid experiences with simulation model creation and the testbench build
3.C/C++ software development experiences is a plus
2 Senior/MTS AISC Design Engineer
Core Qualification Required
1. Master with 2+ (or Bachelor with 4+) years working experience in ASIC area
2.Micro-processor (e.g. ARM) architecture and peripheral; Popular on-chip bus (AMBA/AXI) or NOC; low power design and verification methodology; Standard IO IPs, including SPI/SMBUS/GPIO/I2C/I2S/UART; DFT/JTAG, etc.
3. Knowledge on synthesis, timing analysis, CDC and formal verification
3 Senior/MTS DFT Engineer
Core Qualification Required
1. Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.
2. Perform verification on all DFT structures
3. Generate DFT related timing constraints and work with PD team for timing closure
4 Senior/MTS Physical Design Engineer
Core Qualification Required
1. MSEE with 6+ years or Bachelor with 8+ years of industrial experience in ASIC design
2. 5+ years or more years of experience in physical design of deep submicron digital ASIC chips
3. Hands on experience in large scale ASIC chip physical design
5 Senior/MTS ASIC Design Verification engineer (Graphics Performance verification)
Core Qualification Required
1. Expert of Verilog RTL design and experience of large digital ASIC project.
2. Familiar with front-end EDA tools and flows.
3. Familiar with C/C++ programming and unix/linux and scripts
6 MTS ASIC Design Verification engineer (Graphics performance Analysis & Architecture Medeling)
Core Qualification Required
1. 3 + year experience on C\C++
2. Plus with 3+ years’ OpenGL/D3D programming/ driver experience; 2+ years' Linux/Shell/perl/python
3. Plus with experience on CPU/GPU Design/Verification
7 Senior/MTS ASIC design/Front-End Engineer – Graphics
Core Qualification Required
1. MS degree of EE with 5+ years working experience in ASIC Company.
2. Expert of Verilog RTL design and has experience of large digital ASIC project.
3.Familiar with front-end EDA tools and flows; C/C++ programming and unix/linux and scripts (tcl, perl etc.)
8 Sr./MTS ASIC Design Verification Engineer (Graphics IP)
Core Qualification Required
1. Familiar with Linux Environment (including shell scripting and linux gnu tools)
2. Experience with design for verification (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)
3.Should be versatile in any one of the high level verification flow such as SV,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verification
9 Sr./MTS ASIC Design Verification Engineer (3D Graphics)
Core Qualification Required
1. Requires demonstrated technical expertise in functional verification of complex designs including: test planning, test bench development, stimulus generation, checking, and functional coverage.
2. Significant experience with Verilog, C/C++, Perl, and logic simulation is a requirement.
3. xperience with SystemVerilog/OVM is an optional.
10 MTS/Sr.ASIC Design Verification engineer (Multimedia)
Core Qualification Required
1. Strong RTL coding and familiar with front-end design flow
2. Experience on synthesis, timing analysis and formal verification.
3. Experience of display specific-interconnection protocols is a plus
11 MTS / Sr. Software Development Engineer / NCG(应届生) for Graphics driver and game engine development
Core Qualification Required
1. Highly-skilled software designer and engineer, strong in 3D math,
2. Fluent in C and C++ and the efficient use of discrete GPUs, APUs, and CPUs
3. Fluent in C and C++ and the efficient use of discrete GPUs, APUs, and CPUs
12 Sr. SoftwareDevelopment Engineer / NCG(应届生)-OpenGL
Core Qualification Required
1. Strong expertise in computer architecture, datastructure and algorightms
2. Rich and strong experience in C/C++ programming (5 years experience for MTSapplicants); Solid knowledge in Computer Graphics,understand GPU graphicspipeline,shader system
3. Familiarity with ARM/Android platform,Direct3D and compiler technology is adesired plus
13 Sr. MultimediaDriver/Firmware Engineer
Core Qualification Required
1. Understanding of X86 architecture, be familiar withvideo processing like Encode/Decode etc
2. Strong knowledge and past experience on video codecs, such as MPEG-1,MPEG-2, H.264 and H.265 is required
3. Experience and skills on user mode driver debugging and development isrequired
14 Sr./MTS. BIOSEngineer
Core Qualification Required
1. MTS candidate: BS-CS/BS-EE with at least 7 yearsexperience or 5+ years experience for MS with BIOS, firmware, or systemsoftware development
2. Sr. engineer candidate: BS-CS/BS-EE with at least 5 years experience or 3+years experience for MS with BIOS, firmware, or system software development
3. Strong Knowledge about ACPI, USB, PCIE, SATA and other PC industry standard
15 Sr. ASIC Design Engineer – Display (Multimedia)
Core Qualification Required
1. Familiar with Linux Environment (including shell scripting and linux gnu tools)
2. Good at C/C++, Perl, Makefile, familiar with Ruby, SystemVerilog, SystemC is a plus
3. Familiar with RTL coding and front-end design flow
16 Trade compliance manager(Great China)
Core Qualification Required
1. Knowledge of US export administration regulations, semiconductor and encryption licensing a plus.
2. Experience with management of VEU or Site licenses a plus
3. Knowledge and experience with US export controls as well as the export/customs regulations of Singapore, Hong Kong and Malaysia
Location: Beijing
1 Sr./MTS ASIC Verification Engineer
Core Qualification Required
1. Experience in one or more of following areas: micro-processor system, on-chip interconnection (AXI, NOC), low power design and verification, DFT, security, etc. is must
2. Excellent knowledge and experience of UVM/OVM verification methodology at both sub-IP and SoC levels.
3. Good team player to drive and to lead a task from scratch to closure.
2 Sr./MTS DFT Scan Engineer
Core Qualification Required
1. Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.
2. Perform verification on all DFT structures
3. Generate DFT related timing constraints and work with PD team for timing closure
3 Senior/MTS Physical Design Engineer
Core Qualification Required
1. MSEE with 6+ years or Bachelor with 8+ years of industrial experience in ASIC design
2. 5+ years or more years of experience in physical design of deep submicron digital ASIC chips
3. Hands on experience in large scale ASIC chip physical design
4 Sr. ASIC Design Engineer – Display (Multimedia)
Core Qualification Required
1. Familiar with Linux Environment (including shell scripting and linux gnu tools)
2. Good at C/C++, Perl, Makefile, familiar with Ruby, SystemVerilog, SystemC is a plus
3. Familiar with RTL coding and front-end design flow
Location: Taipei
1 SMTS Application Engineer_Image Signal Processor (ISP)
Core Qualification Required
1. Solid knowledge in optical system, imaging and image quality
2. At least six years of prior experience with image quality evaluation, camera systems development, and imaging tuning is required.
3. Strong C/C++ and Matlab programming skills.
Location: HsinChu
1 Sect. Manager Prod. Planning & Control
Core Qualification Required
1. Bachelor degree or above in business/material management or industry engineering.
2. 8-10 years’ experience in semiconductor manufacturing production planning under supply chain organization.
3. Experience in outsourcing/OSAT management
4. Influencing across functions & regions with strong interpersonal , communication and leadership skills
Location: Suzhou
1 Sr. Product Development Engineer (For FA&REL)
Core Qualification Required
1. Bachelor or above degrees in microelectronics, material, EE, physics and semiconductor etc, total 5 – 8 years working experience
2. Hands-on experience on electrical and physical failure analysis including fault isolation and defect characterization via curve trace, SEM/EDX/FIB, CSAM, X-ray, polisher, cross-section, EMMI/OBIRCH etc
3.Good skills in report and document writing and presentation
期待你的加入！