做 ASIC后端设计的人才请看过来，physical design leader 职位
时间：12-12
整理：3721RD
点击：
职位信息：
Title： physical design leader
实际代行design manager职责。
45-65万。美资公司。
有兴趣请发送简历给 24402505@qq.com。欢迎QQ在线交流。
要求： 数字电路后端设计经验，英语口语流利。
In Charge of Digital Back-end Physical Design & automation;
- Main responsibilities include circuit synthesis, physical synthesis, static timing analysis, chip Floorplanning, auto place and route, capacitance and resistance extraction, design rule checking and delay back-annotation;
- Responsible for clock tree synthesis, scan chain generation, critical path timing analysis and power analysis.- DRC/LVS command file writing and maintenance Requirements:
- BS or above with major in EE or Computer Science related field;
- Familiar with Floorplan, placement/routing, CTS, and LVS/DRC design flow and be capable of running projects independently;
- Experience with timing driven design flow preferred; Experience with DSM IC design or process, and familiar with device modeling, crosstalk, IR drop analysis, preferred.
Title： physical design leader
实际代行design manager职责。
45-65万。美资公司。
有兴趣请发送简历给 24402505@qq.com。欢迎QQ在线交流。
要求： 数字电路后端设计经验，英语口语流利。
In Charge of Digital Back-end Physical Design & automation;
- Main responsibilities include circuit synthesis, physical synthesis, static timing analysis, chip Floorplanning, auto place and route, capacitance and resistance extraction, design rule checking and delay back-annotation;
- Responsible for clock tree synthesis, scan chain generation, critical path timing analysis and power analysis.- DRC/LVS command file writing and maintenance Requirements:
- BS or above with major in EE or Computer Science related field;
- Familiar with Floorplan, placement/routing, CTS, and LVS/DRC design flow and be capable of running projects independently;
- Experience with timing driven design flow preferred; Experience with DSM IC design or process, and familiar with device modeling, crosstalk, IR drop analysis, preferred.
你好，打扰了。请问有上海数字后端的一般职位吗？两年的工作经验，现在上海张江工作，谢谢！
请大家关注该职位。
后端职位多多啊。请发简历给 24402505@qq.com。