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求几篇微电子相关论文~拜谢

时间:12-12 整理:3721RD 点击:
有点儿多,下到部分的也行~可以发信给我,十分感谢啊
①Xiaokang Shi, Min Yu, Hao Shi, Ru Huang, Xing Zhang, Yangyuan Wang, Jinyu Zhang, "REACE: A new algorithm for low energy ion implantation simulation ", Materials Research Society Symposium - Proceedings ,vol.792, pp.503-508(2004)
②Reinhart Job, Wolfgang Düngen, "Germanium Layer Exfoliation by Ion-Cut Processes" Semiconductor Defect Engineering-Materials, Synthetic Structures and Devices, vol.994, pp.257-262(2007)
③Guo, X., Adikaari, A.A.D.T., Silva, S.R.P., "Performance evaluation and design guidelines of sub-100-nm source/drain unilateral-crystallized poly-Si TFTs for SoP applications", IDW '06 - Proceedings of the 13th International Display Workshops3, pp. 1667-1670(2006)
④ Pankratov, E.L., "Analysis of redistribution of radiation defects taking into account diffusion and several secondary processes", Modern Physics Letters B22 (28), pp.2779-2791(2008)
⑤[147] Min Yu, Xiao Zhang, Ru Huang, Xing Zhang, Yangyuan Wang, Jinyu Zhang, Hideki Oka, "The role of surface annihilation in annealing investigated by atomic model simulation", Semiconductor Defect Engineering - Materials, Synthetic Structures and Devices, vol.864, pp. 467-472(2005)
⑥Fan, Z.-Q., Chen, K.-Q., "Theoretical investigation of gate voltage controllable transport properties in single C60 molecular device", International Journal of Modern Physics B25 (29), pp. 3871-3880(2011)
⑦Chenyue, M., Bo, L., Hao, W., Xing, Z., Jin, H., "Compact negative bias temperature instability model for silicon nanowire MOSFET (SNWT) and application in circuit performance simulation", Journal of Computational and Theoretical Nanoscience7 (1), pp. 107-114(2010)
⑧Cho, S (Cho, Seongjae), Jhon, HS (Jhon, Hee-Sauk), Lee, JH (Lee, Jung Hoon), Park, SH (Park, Se Hwan), Shin, H (Shin, Hyungcheol), Park, BG (Park, Byung-Gook), "Device and Circuit Codesign Strategy for Application to Low-Noise Amplifier Based on Silicon Nanowire Metal-Oxide-Semiconductor Field Effect Transistors", JAPANESE JOURNAL OF APPLIED PHYSICS, vol.49(2010)
⑨Kim, S., Jo, M., Jung, S., Choi, H., Lee, J., Chang, M., Cho, C., Hwang, H., "Effect of high pressure hydrogen annealing on silicon nanowire MOSFET devices with multi-channel wires", 2009 International Semiconductor Device Research Symposium, ISDRS '09, art. No. 5378316(2009)
10、 Lakshmi, B., Srinivasan, R. "Study of process variations on f t in 30 nm gate length finfet using TCAD simulations", Communications in Computer and Information Science142 CCIS, pp. 482-486(2011)
11、 Baek, R.-H., Baek, C.-K., Jung, S.-W., Yeoh, Y.Y., Kim, D.-W., Lee, J.-S., Kim, D.M., Jeong, Y.-H., Comparison of series resistance and mobility degradation extracted from n- and p-type si-nanowire field effect transistors using the y-function technique, Japanese Journal of Applied Physics49 (4 PART2), art. no. 04DN06 (2010)

友情提示:淘宝上有代下论文的,一块钱一篇,哈哈。

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