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问一个复位树综合的问题

时间:12-12 整理:3721RD 点击:
我的复位树里有4个复位,然后有的复位需要模块反馈信号生成,刚开始上电时统一复位。
我dc完成后,没有报violation
但是pt的时候报告的都是复位树里的寄存器的时序问题,如下:
  Startpoint: rst_mod/rst_div_reg
               (rising edge-triggered flip-flop clocked by clk2)
  Endpoint: div3/I_reg_0_
               (recovery check against rising-edge clock clk1)
  Path Group: **async_default**
  Path Type: max
clk2是clk1的二分频
而且报告的器件延时也是不合实际的大
  U438350/Y (BUFX16)   2.18       4.92 r
  U452917/Y (INVX1)    2.12       7.04 f
  U436200/Y (INVX8)    2.52       9.56 r
  U436190/Y (BUFX20)   2.00      11.57 r
  U227/Y (BUFX20)      1.81      13.37 r
  U436065/Y (BUFX4)    2.22      15.60 r
  U451311/Y (INVX1)    1.98      17.58 f
目前设置如下:
set_false_path -from {rst_mod/rst}
set_false_path -from {rst_mod/rst_div_out}
set_ideal_network -no_propagate -from {rst_mod/rst}
set_ideal_network -no_propagate -from {rst_mod/rst_div_out}
是不是用了-no_propagate选项的问题啊,不应该让复位传播吧?
但是在复位树模块里,那些寄存器约束应该怎么设置?

  Startpoint: rst_mod/rst_div_reg
               (rising edge-triggered flip-flop clocked by clk2)
  Endpoint: top_core/tgx_core/dma/div3/I_reg_0_
               (recovery check against rising-edge clock clk2)
  Path Group: **async_default**
  Path Type: max
Point                                                   Incr       Path
------------------------------------------------------------------------------
clock clk2 (rise edge)                                  0.00       0.00
clock network delay (ideal)                             0.00       0.00
rst_mod/rst_div_reg/CK (SDFFRHQX1)
                                                        0.00       0.00 r
rst_mod/rst_div_reg/Q (SDFFRHQX1)
                                                        0.69       0.69 r
rst_mod/U66/Y (OAI2BB1X1)                               0.26 H     0.95 r
top_core/tgx_core/U236/Y (INVX1)                       0.15 H     1.10 f
top_core/tgx_core/U123/Y (INVX1)                       1.31       2.41 r
top_core/tgx_core/dma/U1426/Y (INVX1)               0.52       2.93 f
top_core/tgx_core/dma/U1425/Y (INVX1)               0.47       3.40 r
top_core/tgx_core/dma/U1232/Y (INVX1)               0.24       3.64 f
top_core/tgx_core/dma/U828/Y (INVX1)                1.66       5.29 r
top_core/tgx_core/dma/U212/Y (INVX1)
                                                        0.98       6.27 f
top_core/tgx_core/dma/U211/Y (INVX2)
                                                        1.33       7.61 r
top_core/tgx_core/dma/U159/Y (INVX1)                    0.48       8.09 f
top_core/tgx_core/dma/U158/Y (INVX1)                     1.35       9.44 r
top_core/tgx_core/dma/div3/I_reg_0_/RN (SDFFRHQX4)
                                                        0.00       9.44 r
data arrival time                                                  9.44
clock clk2 (rise edge)                                  9.52       9.52
clock network delay (ideal)                             0.00       9.52
clock uncertainty                                      -0.20       9.32
top_core/tgx_core/dma/div3/I_reg_0_/CK (SDFFRHQX4)
                                                                   9.32 r
library recovery time                                  -0.32       9.00
data required time                                                 9.00
------------------------------------------------------------------------------
data required time                                                 9.00
data arrival time                                                 -9.44
------------------------------------------------------------------------------
slack (VIOLATED)                                                  -0.44
另外-no_propagate我的理解是这样的:
A模块的输出rst4如果设置成 -no_propagate 的话,A里边吧rst4当作ideal network
但是rst4进入到B模块后就不是了
不知道对不对
还有,就是异步复位每个寄存器的话,即使经过了多个模块,他所复位的寄存器也应该是
同时复位吧。这个应该有后端来修复吗?
或者综合时怎么约束一下?
谢谢

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