Atmel AT86RF233单片2.4GHz无线收发解决方案

Atmel 公司的AT86RF233是富有特性极低功耗的单片2.4GHz无线收发器,接收器灵敏度-101dBm,可编程输出功率从-17dBm到+40dBm,工作电压1.8V-3.6V,深度睡眠的功耗为0.02uA,主要用于 2.4GHz IEEE 802.15.4和ZigBee系统,RF4CE系统,能量收获系统,6LoWPAN系统,工业控制,住宅区和商业自动化,医疗保健,消费类电子和PC外设等.本文介绍了AT86RF233主要特性,方框图,基本和扩展特性应用电路,以及评估板REB233SMAD主要特性,框图,电路图,材料清单和PCB元件布局图.

The Atmel AT86RF233 is a feature rich, extremely low-power 2.4GHz radio transceiver designed for industrial and consumer ZigBee/IEEE 802.15.4, RF4CE, 6LoWPAN, and high data rate 2.4GHz ISM band applications. The radio transceiver is a true SPI-to-antenna solution. All RF-critical components except the antenna, crystal and de-coupling capacitors are integrated on-chip. MAC and AES hardware accelerators improve overall system power efficiency and timing. Therefore, the AT86RF233 is particularly suitable for applications like:

2.4GHz IEEE 802.15.4 and ZigBee systems

RF4CE systems

Energy Harvesting systems

6LoWPAN systems

Wireless sensor networks

Industrial Control

Residential and commercial automation

Health care

Consumer electronics

PC peripherals

The Atmel AT86RF233 single-chip radio transceiver provides a complete radio transceiver interface between an antenna and a microcontroller. It comprises the analog radio, digital modulation and demodulation including time and frequency synchronization and data buffering. The number of external components is minimized such that only the antenna, the crystal and decoupling capacitors are required. The bidirectional differential antenna pins (RFP, RFN) are used for transmission and reception, thus no external antenna switch is needed.

The received RF signal at pin 5 (RFN) and pin 6 (RFP) is differentially fed through the low-noise amplifier (LNA) to the RF filter (PPF) to generate a complex signal, driving the integrated channel filter (BPF). The limiting amplifier provides sufficient gain to drive the succeeding analog-to-digital converter (ADC) and generates a digital RSSI signal. The ADC output signal is sampled by the digital base band receiver (RX BBP).

The transmit modulation scheme is offset-QPSK (O-QPSK) with half-sine pulse shaping and 32-length block coding (spreading) according to [2] and [1]. The modulation signal is generated in the digital transmitter (TX BBP) and applied to the fractional-N frequency synthesis (PLL), to ensure the coherent phase modulation required for demodulation of O-QPSK signals. The frequency-modulated signal is fed to the power amplifier (PA).

A differential pin pair DIG3/DIG4 can be enabled to control an external RF front-end. Two on-chip low-dropout voltage regulators (A|DVREG) provide the analog and digital 1.8V supply.

An internal 128-byte RAM for RX and TX (Frame Buffer) buffers the data to be transmitted or the received data.

The configuration of the Atmel AT86RF233, reading and writing of Frame Buffer is controlled by the SPI interface and additional control lines.

The AT86RF233 further contains comprehensive hardware-MAC support (Extended Operating Mode) and a security engine (AES) to improve the overall system power efficiency and timing. The stand-alone 128-bit AES engine can be accessed in parallel to all PHY operational transactions and states using the SPI interface, except during SLEEP and DEEP_SLEEP states.

For applications not necessarily targeting IEEE 802.15.4 compliant networks, the radio transceiver also supports alternative data rates up to 2000kb/s.

For long-range applications or to improve the reliability of an RF connect