电子术语中英文对照

断点的机制。

C　CISC（复杂指令集计算机）

　　 Complex Instruction Set Computer. Describes the architecture of a processor family. CISC processors generally feature variable -length instructions, multiple addressing formats, and contain only a small number of general –purpose registers. Intel"s 80x86 family is the quintessential example of CISC. Contrast with RISC.

复杂指令集计算机。对一种处理器架构的描述。CISC处理器一般产生变的指令，多种地址格式，并且仅仅有少量的通用寄存器。Intel的80x86家族是是典型的CISC处理器。相对于RISC而言。

　CPU（中央处理器）

　　 Central Processing Unit. The part of a processor that executes instructions.

中央处理器。处理器中执行指令的那一部分。

　Compiler（编译器）

A software development tool that translates high- level language programs into the machine-language instructions that a particular processor can understand and execute.

把高级编程语言程序转换到只有特定的处理器能了解和执行的机器指令的一种软件开发包。

　context （上下文）

　　The current state of the processor"s registers and flags.

处理器当前的状态和标志。

　context switch（上下文切换）

　　 The process of switching from one task to another in a multitasking operating system. A context switch involves saving the context of the running ask and restoring the previously-saved context of the other. The piece of code that does this is necessarily processor-specific.

在多任务操作系统中我一个任务切换到另一个的过程。上下文切换包括保存正在运行的任务的上下文和恢复早先保存的另一个任务的上下文。做这个工作的一段代码必须具有处理器特权。

　counting semaphore（计数信号）

　　 A type of semaphore that is used to track multiple resources of the same type. An attempt to take a counting semaphore is blocked only if all of the available resources are in use. Contrast with binary semaphore.

一种用来跟踪多个相同类型资源的信号灯。仅仅在所有可用的资源都被用完了时才阻塞。相对二元信号而言。

　critical section（临界段）

　　 A block of code that must be executed in sequence and without interruption to guarantee correct operation of the software. See also race condition.

一段必须按次序执行的代码，并且不能被中断，否则不能保证软件正确地操作。参照：竞争状况。

cross-compiler（交叉编译器）

　　 A compiler that runs on a different platform than the one for which it produces object code. A cross-compiler runs on a host computer and produces object code for the target.

　　一个运行在不同的平台上的编译器，其中之一能产生目标代码。交叉编译器在主机上运行并且产生目标机的目标代码。

D

　　DMA（直接内存访问）

　　 Direct Memory Access. A technique for transferring data directly between two peripherals (usually memory and an I/O device) with only minimal intervention by the processor. DMA transfers are managed by a third peripheral called a DMA controller.

直接内存访问。一种直接在两个外设（通常是内存和I/O设备）之间进行数据传输的技术，它只要处理器最少的介入。DMA传输由叫DMA控制器的第三方外设进行管理。

　　DRAM（动态随机访问存储器）

　　 Dynamic Random- Access Memory. A type of RAM that maintains its contents only as long as the data stored in the device is refreshed at regular intervals. The refresh cycles are usually performed by a peripheral called a DRAM controller.

动态随机访问存储器。一种RAM，存储在其设备中的数据被定期刷新时才能保存它的内容。刷新周期一般由一个叫DRAM控制器的外设完成。

　　Data bus（数据总线）

　　 A set of electrical lines connected to the processor and all of the peripherals with which it communicates. When the processor wants to read (write) the contents of a memory location or register within a particular peripheral, it sets the address bus pins appropriately and receives (transmits) the contents on the data bus.

连接处理器与所有外设进行通讯的电子线路集。当一个处理器想