Rhythm R3710预配置DSP系统实践应用指南

tch is changed and then the other, the part transitions to an intermediate memory before reaching the final memory. The part starts in whatever memory the switches are selecting. If a memory is invalid, the part defaults to memory A.

This mode is set by programming the ‘MSSMode’ parameter to ‘static’ and ‘Donly’ to ‘disabled’.

Table 6. MEMORY SELECTED BY STATIC SWITCH ON MS1 AND MS2 MODE; INTERNAL RESISTORS SET TO PULL DOWN (EXAMPLE WITH FOUR VALID MEMORIES)

Static Switch on MS1, Static Switch on MS2 (Jump to Last Memory)

This mode uses two static switches to change memories. Unlike in the previous example, this mode will switch to the last valid memory when the static switch on MS2 is HIGH or LOW depending on the configuratoin of MS2. This means that this mode will only use a maximum of three memories (even if four valid memories are programmed). Tables 7 and 8 describe which memory is selected depending on the state of the switches.

This mode is set by programming the ‘MSSMode’ parameter to ‘static’ and ‘Donly’ to ‘enabled’.

Table 7. MEMORY SELECTED BY STATIC SWITCH ON MS1, STATIC SWITCH ON MS2 (JUMP TO LAST MEMORY) MODE; INTERNAL RESISTORS SET TO PULL−DOWN Table 8. MEMORY SELECTED BY STATIC SWITCH ON MS1, STATIC SWITCH ON MS2 (JUMP TO LAST MEMORY) MODE; INTERNAL RESISTORS SET TO PULL−UP In this mode, it is possible to jump from any memory to any other memory simply by changing the state of both switches. If both switches are changed simultaneously, then the transition is smooth. Otherwise, if one switch is changed and then the other, the part transitions to an intermediate memory before reaching the final memory.

With pull−up/pull−down = pull−down, when MS2 is set HIGH, the state of the switch on MS1 is ignored. This prevents memory select beeps from occurring if switching MS1 when MS2 is HIGH. The part starts in whatever memory the switches are selecting. If a memory is invalid, the part defaults to memory A. With pull−up/pull−down = pull−up, when MS2 is set LOW, the state of the switch on MS1 is ignored. This prevents memory select beeps from occurring if switching MS1 when MS2 is LOW. The part starts in whatever memory the switches are selecting. If a memory is invalid, the part defaults to memory A.

AGC−O and Peak Clipper

The output compression−limiting block (AGC−O) is an output limiting circuit whose compression ratio is fixed at : 1. The threshold level is programmable. The AGC−O module has programmable attack and release time constants.

The AGC−O on Rhythm R3710 has optional adaptive release functionality. When this function is enabled, the release time varies depending on the environment. In general terms, the release time becomes faster in environments where the average level is well below the threshold and only brief intermittent transients exceed the threshold.

Conversely, in environments where the average level is close to the AGC−O threshold, the release time applied to portions of the signal exceeding the threshold is longer. The result is an effective low distortion output limiter that clamps down very quickly on momentary transients but reacts more smoothly in loud environments to minimize compression pumping artifacts. The programmed release time is the longest release time applied, while the fastest release time is 16 times faster. For example, if a release