MSP430F522x和MSP430F521x设计注意事项

1.Split-Supply I/O Systems

For split-supply I/O systems, the split supplies are connected to the VCC (DVCC and AVCC) and DVIO pins. Supply voltage at DVCC and AVCC pins (VCC) is used to provide device power, and the supply voltage at the DVIO pin (VIO) is used to supply the I/O rail of the "DVIO supplied I/O pins". The recommended VCC supply voltage ranges from 1.8 V to 3.6 V (see note A on Figure 1) and, therefore, these devices do not operate at nominal 1.8 V (that is, 1.8 V ± 10%) supply voltage level. The VIO supply voltage ranges from 1.62 V to VCC(c) and is useful in applications that interface with nominal 1.8-V I/O interface (that is, 1.8 V ± 10%).

A The recommended VCC supply voltage range of 1.8 V to 3.6 V is applicable to the VCORE setting of PMMCOREVx = 0. See the device data sheet for the VCC supply voltage ranges at different VCORE settings. B It is recommended to power AVCC and DVCC from the same source. A maximum difference of 0.3 V between AVCC and DVCC can be tolerated during power-up and operation. C See the F522x and F521x data sheet [1] for the VIO supply voltage range. Figure 1. Split Supply I/O Systems.

2. DVIO Supplied I/Os

A group of general-purpose I/Os reside on the DVIO supply domain and are called DVIO supplied I/Os. On the MSP430F522x devices, the following I/Os reside on the DVIO supply domain: Port1 (P1.4 to P1.7), Port2, Port3, Port4, and Port7. The remaining port I/Os reside on the DVCC supply domain.

In the device data sheet, these I/O ports are highlighted in the functional block diagrams and are also pointed out in the "Terminal Functions" table for respective I/O pins. Also, the electrical characteristics of I/Os in the DVIO and the DVCC domains are specified separately in the device data sheet [1].

3 Secondary Digital Functions on DVIO Supplied I/Os

The DVIO supplied general-purpose I/Os are multiplexed with other digital functions in the device, and these digital functions’ I/O circuits are also powered from DVIO. On the F522x and F521x devices, some of the secondary digital functions that are shared with the DVIO supplied I/Os include timer capture compare functions, serial communication functions (USCI UART, SPI, or I2C), comparator output, SMCLK output, and MCLK output. See the Terminal Functions table in the device data sheet [1] for details.

On the F522x and F521x devices, Port4 supports port mapping and resides on the DVIO supply domain. Any of the secondary digital functions specified in the port mapping table can be mapped to Port4, and their respective I/O circuitry is supplied by DVIO. See the port mapping table in the Peripherals section of the data sheet [1] for details.

NOTE: In split supply I/O systems, if external pullup resistors are connected to any of the DVIO supplied pins (for example, the USCI I2C pins – SDA and SCL), tie the external pullups to the DVIO supply and not to DVCC.

Other DVIO supplied digital pins on the F522x and F521x devices include: • BSLEN – BSL enable pin used by the DVIO supplied BSL interface (see Section 7). By default, this pin has a nonconfigurable internal pulldown resistor enabled. • RST/NMI – DVIO supplied reset pin multiplexed with NMI functionality. See Section 5 for details of the reset functionality.

4 Split-Supply Power-Up or Power-Down Sequence

For split-supply I/O systems, it is required that the VIO ≥ VCC during the ramp up phase of VIO and VCC. During VCC and VIO power down, it is required that VIO ≥ VCC during the ramp down phase of VIO