About planar Inductor
时间:04-09
整理:3721RD
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Hi, I've got a question about the layout of planar inductor.
What does the real cross sessional view look like? I draw a draft of the view.
1. Is the k=8.1 thin layers (blue) still made for metal 5 and 6, where inductor is layout?
2. How about the layer of metal 1,2,3,4? There are no metals in these layer, so the similiar thin high k layers (blue,dashed) on top and bottom of metals still presents or not?
4. Is the poly (patterned ground shield) made on the substrate directly? or there needs a oxide such as filed oxide layer (green).
3. is the K=7 layers (red) always around poly tracks? If so, then how to model them in ADS?
4. Is the poly (patterned ground shield) made on the substrate directly? or there needs a oxide such as filed oxide layer (green).
Thanks a lot.
What does the real cross sessional view look like? I draw a draft of the view.
1. Is the k=8.1 thin layers (blue) still made for metal 5 and 6, where inductor is layout?
2. How about the layer of metal 1,2,3,4? There are no metals in these layer, so the similiar thin high k layers (blue,dashed) on top and bottom of metals still presents or not?
4. Is the poly (patterned ground shield) made on the substrate directly? or there needs a oxide such as filed oxide layer (green).
3. is the K=7 layers (red) always around poly tracks? If so, then how to model them in ADS?
4. Is the poly (patterned ground shield) made on the substrate directly? or there needs a oxide such as filed oxide layer (green).
Thanks a lot.
you can model with cond, cond2 and vias
Thanks a lot.
But I just don't know if the nitride layer with K=8.1 (blue) is still fabricated even if I don't use metal 1,2,3,4 for inductor design?
similar confusion about the nitride layer around polysilicon.
Or, these high K layers can be ignored because they are too thin (<100nm)?
Thanks a lot.
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