Looking for Step Attenuator design
1. MESFET switches (note: NOT CMOS)
2. Steps 0.5, 1, 2, 4, 8, 16 dB
3. Small Thru insertion loss < 1.6dB (up to 2GHz) < 2 dB (up to 3GHz)
4. Bandwidth, 700MHz ~ 3GHz or even higher
5. GOOD step flatness < +/-5%
6. Fast switching time (90% settling) < 1uS
I believe this is a very challenge design, I am looking for a reference design, paper, or patent...
Any input is welcome.
Thanks.
The design are possible with GaAs technology.
Tittle: Circuit topology for attenuator and switch circuits
United States Patent 6737933
or/ and
http://rfdesign.com/mag/508RFDF3.pdf
I have a very good design but might not be feasible for you.
This will work above about 1GHz, if you really need it down to 700 you could get it but I don't know how bad your insertion loss would be.
It is all GaAs,
look at the ma-com switches they work well from 1 - 6 GHz with .5 db - 1dB insertion loss. Then you have them switch to different resistive power dividers (very simple up to about 5 GHz).
for above 1GHz you could hit your mark on insertion loss but down to 700MHz would be difficult, if not for the switch times you could use electromechanical and this would be a very easy design.
Let me know if you want a schematic of this.
Yes, please send it to me, thanks a lot
May I request you to share in the Forum?
If not please send to me too.
what about the linearity? actually I am designing a cmos attenuator for wideband using, the linearity is a big problem when high attenuation is need, such 36dB...
At this attenuation level it depends on the topology that been used.