mixer tuning
(1)
Analog Devices datasheet (page 18 of 24) for mixer (ADL5350) suggest that I tune the LO port input network for optimum return loss. Can I do this without a smith chart? How is this done without a smith chart?
(2)
Also the datasheet (page 18 of 24) suggest a simple LC bandpass filter with illustration on page 17 of 24, figure 58. In table 8 (page 18 of 24) Analog Devices was nice enought to provide appropriate L and C values for LO,RF, IF frequencies. Considering only the LO, my LO frequency range is 2260Mhz to 2343MHz which is not on the list. Is it safe to exptrapolate. Should L3 be 3.3nH,3.4nH, neither?
(3)
Back to page 18 of 24 of the data sheet. Top left hand column. First they mention an illustration of a LC bandpass filter in figure 58. Then 4-5 lines down they say its forms a Low Pass filter. So is it a BP or LP?
Seeking to understand..........
Yes you can do without smith chart as indicated in para 3.
Also mentioned that "It is necessary to account for the board parasitics, finite Q, and self-resonant frequencies of the LC components when designing the RF, IF, and LO filter networks. Table 8 provides suggested values for initial prototyping."
There is no much change from 2400MHz to 1950 MHZ from the table (3nH and 3.5nH). So 3nH should work in my guess.
It is basically BP but when you remove C3 it has L3 only then signal goes to a driver (for LO). This driver has shunt capacitance between gate and source thus L3 and this gate Cap forms LP.
So tunning the LO port input network for optimum return loss simply means to add a filter network on the LO input? for the purpose of passing the LO frequency?
The table suggest that L3=3nH and C3=100pF. Well the resonance freq of C3 and L3 is 291MHz. My desired LO frequency range will be 2260MHz-2343MHz. So it looks like to me that hat the suggested values for C3 and L3 will not work for me. Please confirm.
Added after 1 hours 53 minutes:
According to the datasheet table 8 on page 18 "Analog Devices" recommends (for 2400Mhz) a 3nH inductor in series with the gate-to-source capacitance of the buffer amplifier. I didn't know what the capacitance value was. I didn'tsee it in the data sheet.
Question 1:
How do I assume a good value for gate-to-source capacitance of the buffer amplifier?
Question 2:
Assuming the gate-to-source capacitance (neglecting parasitics,etc) is 10pF. According to "Quicksmith" Z = 50 +36.43j. I would then just have to remove the inductive reactance correct? so that I just get a Z = 50 +0j (or really close to 0). Please confirm.
Yes
The chip paracities are not accounted which are known
Better ask vendor who normally reject any plea on chip impedance information.So just follow what he guide.
Assumptions may/not work.
I need some more time to answer