low quadrature error architecture (?)
时间：04-08
整理：3721RD
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Hi everybody,
this is my first post in this forum, even if I've always been looking with interest to a lot of posts :D
I'm working on a project where the quality of the post processing in BB strongly depends on the phase error between the two LOs sin and cos of the receiver. I was wondering, is there any architecture that has some kind of trick to eliminte or compensate for the phase error created in generating the quadrature signal?
Thanks
M.
Added after 1 hours 56 minutes:
what about a Digital IF Hartley receiver in which I perform the first downconversion just with a cos and then I go to digital and generate sin and cos digitally with a known error?
this is my first post in this forum, even if I've always been looking with interest to a lot of posts :D
I'm working on a project where the quality of the post processing in BB strongly depends on the phase error between the two LOs sin and cos of the receiver. I was wondering, is there any architecture that has some kind of trick to eliminte or compensate for the phase error created in generating the quadrature signal?
Thanks
M.
Added after 1 hours 56 minutes:
what about a Digital IF Hartley receiver in which I perform the first downconversion just with a cos and then I go to digital and generate sin and cos digitally with a known error?