cmos transformer s-parameter simulation correct setup?

Dear all,

I need to design the CMOS transformer for usage. This is a 4 ports component with P-p P-n and S-p S-n. However, I do not know the correct test bench setup for S-parameter simulation. Could anyone teach me?

I guess the setup is like this. Tell me this is correct or not?
P-p connects to Port 1
P-n connects to ground
S-p connects to Port 2
S-n connects to ground
Then, the S21 is the insertion loss of this transformer. Is it correct?

Thanks

wccheng

Yes, this should work. Just make sure that your ports in the test bench have the correct impedance.

You can also connect port component in ADS differentially.It will also work..