PLL based phase-shift generator circuit

I read an academic paper the other day, and I'm having trouble understanding the theory behind how the circuit described in the paper can be used to add an arbitrary phase shift to an input signal.

The paper is here: Phase-shift generation and monitoring by a simple circuit (.pdf file)

Basically it states that adding a specific voltage to the input of the VCO in a standard PLL circuit (they use an obsolete LM565 PLL chip) will shift the output signal by a proportional phase angle.

Based on my fairly limited understanding of PLLs, wouldn't the added voltage cause the VCO to increase its output frequency, which would be detected as a phase error by the phase detector, and cause the phase detector to "fight" the increase in voltage and bring it back into lock?
I keep thinking that it would just lead to a very temporary frequency and phase change that the PLL would eliminate through feedback, but I'm obviously missing something.

Can anyone explain?

I haven't read the paper (on my mobile at the moment) but my guess is it depends on the phase detector. Some lock with zero degrees error, other lock with a phase error which depends on the difference between the incoming signal and the VCO natural frequency (or its minimum or maximum - I am not sure which). So, my assumption is that the paper relies on the latter type of phase detector. Then if you pull the nominal VCO frequency it will alter the phase shift.

Keith

Precisely. A phase detector, in general, is designed to put out "zero error volts" when the measured signal is locked to the reference signal. The details vary widely in phase detector and loop filter types. But assume the phase detctor has a single output "DC" voltage. When the signals are locked in phase (which may mean the same phase, or a 90 degree difference between the signals--depending on the detector used) you get zero volts out. Lets say the phase detector gain constant was 60 degrees per volt. If you feed the detector voltage into a summing junction, and then into the loop filter, and add a 100 mV offset DC voltage to the summing junction, you should (after some settling time) get a 6 degree phase shift in the vco.

565 uses a simple EXOR phase detector which requires a phase delta to produce a DC correction via duty cycle of output. Most synthesizer uses 'D' edge triggered phase detector that will pump the output filter until lock is achieved which it then goes to high impedance state at phase lock only pumping periodically to refresh filter and maintain lock.

A good phase shift for audio is the analog bucket brigade chips. DSP's perform same function in digitized waveform.

So I need a specific type of phase detector in the PLL? Would one of the detectors in a 74HCT4046 do the job?

Yes. Check the data sheet - one of the phase comparators locks with a variable phase shift. PC1 I think.

Keith

Looks like PC1 is an XOR detector, so I'm guess that's it.
I'm still can't get my head around how the feedback loop will allow an arbitrary phase difference, but I'm going to build the circuit and test it out.

OK. So I re-read the paper, and basically I'm a complete idiot. Must have read it really quickly the first time.

They aren't adding voltage to the VCO input. They are varying the 'free-running frequency' of the voltage-controlled oscillator by changing the component values of the RC circuit that tunes the VCO.
Still not completely sure how this then affects the phase, but once I receive my oscilloscope, I will post some results.

Frequency, phase...same thing. One is integral of other. As you study more, the more you will realize that thing are the same all over.

But how does that help me?