low noise amplifier design help

hi all...
thanks 4 ur reply..
im using NE76000 mesfet model 4 my lna.my vdd is 3.3v. how will i select the bias to be given 2 the mesfet gate terminal after plotting the iv chara.. nothing specifically is given in the datasheet.. in one book it is given that 4 low noise n high power gain id is raised to 0.9idss..
while i plotted the id-vds chara i got idss as 25mA which is almost similar to the plot that is given in datasheet.. what -ve supply should i give..
please help..
thanks..

The data sheet at http://cn.ic-on-line.cn/IOL/datashee...000_235408.pdf already proposes a bias of 3 V and 10 mA.

How to design bias circuit for an RF amplifier is found here: http://www.odyseus.nildram.co.uk/RFM...s_Circuits.pdf

and amplifier design tutorial incl noise figure optimization: http://www.odyseus.nildram.co.uk/RFM...p_tutorial.pdf

I translate: 4=for, 2=to, n=and, ur=your ... but what is "chara"?

chara = lazy?

Keith