PD20015 amplifier issue at 1.8GHz
时间：04-07
整理：3721RD
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I am facing many problems in designing 1800MHz 10watt amplifier with PD20015 LDMOS.
I followed the following design procedure.
1) Performed Small signal s-parameters simulation plus DC analysis.
2) ADS Load PULL test.
3) Picked appropriate Load impedance plus input and Transformed/matched it to 50 ohm.
4) Used ADS Momentum analysis to design transmission line matching network with bias network.
My pcb is double sided FR4 1.6mm with 1 oz copper. All tracks and micro strip lines have "soldering mask" on it.
My testing procedure is that, first Set proper VDD and Idq and then connect the amplifier
with VNA (in Forward Transmission test mode) with a 20 db 10 watt attenuator in series with
amplifier output port (VNA RECEIVER PORT). I get -20db (0 db with out attenuator) gain in the desired frequency range (1800-1830MHz) . When Idq is increased by increasing the Vgs i get -17dbm to -15dbm (3 to 5 db gain without attenuator) but the device become too hot.
Sometimes, while tuning the input and out put matching networks with the SMD trimer (included in the matching network design), the amplifier shows 15 db gain ONLY at a very particular frequency.
Before this, have successfully designed 900MHz, 10-15 watt amplifier with the same LDMOS by following the same procedure.
I followed the following design procedure.
1) Performed Small signal s-parameters simulation plus DC analysis.
2) ADS Load PULL test.
3) Picked appropriate Load impedance plus input and Transformed/matched it to 50 ohm.
4) Used ADS Momentum analysis to design transmission line matching network with bias network.
My pcb is double sided FR4 1.6mm with 1 oz copper. All tracks and micro strip lines have "soldering mask" on it.
My testing procedure is that, first Set proper VDD and Idq and then connect the amplifier
with VNA (in Forward Transmission test mode) with a 20 db 10 watt attenuator in series with
amplifier output port (VNA RECEIVER PORT). I get -20db (0 db with out attenuator) gain in the desired frequency range (1800-1830MHz) . When Idq is increased by increasing the Vgs i get -17dbm to -15dbm (3 to 5 db gain without attenuator) but the device become too hot.
Sometimes, while tuning the input and out put matching networks with the SMD trimer (included in the matching network design), the amplifier shows 15 db gain ONLY at a very particular frequency.
Before this, have successfully designed 900MHz, 10-15 watt amplifier with the same LDMOS by following the same procedure.