direct digital synthesizer as phase shifter

hi all, i would like to find out if DDS can be used as a phase shifter ? if yes, on the datasheet which data represents the resolution of the phase shift ?

will be great if there recommendations of application notes or reference i could read up on.

I don't think that's possible for a DDS to shift an incoming signal. However, DDSs can be used to generate multiple frequencies that are precisely phase shifted from each other - normally by connecting them together through an interface, e.g. see AD9954 data sheet.

what's the precision of the phase shift like ?

I think it's pretty precise. You'd need to check the specific datasheet of the device you're interested in, but in theory it can be extremely precise.
And the shift can remain the same regardless of frequency.

The phase shift resolution is identical to the phase width you set in the DDS design parameters. It can be basically any bit number (usual IP restrict it to 32 or 36 bit), but

1. you need to consider the resource consumption for the sine table respectively generation algorithm
2. sine magnitude and phase resolution should be set in a reasonable relation

im looking at the DDS by analog devices and it shows resolution 14bits, tuning word width 32bits. what does this 2 parameters mean ?

The phase accumulator contains a fractional part to achieve the intended frequency resolution. Only the upper bits of the phase accumulator are used as sine table address. See e.g. http://en.wikipedia.org/wiki/Numeric...led_oscillator

The input to a DDS is a clock signal. The output is an analog output of a DAC that approximates a sine wave. There is no direct connection between the input and output, other than a pretty complex math algorithm that attempts to draw out the output sine wave.

So, can a DDS act as a phase shifter?

1) If you use a DDS that has an internal clock multiplier, you can end up with an internal DDS clock frequency that is some multiple of the clock frequency you input at the clock pin. This part would be essential, since the internal DDS clock frequency wants to be at least 2X the output sine frequency (see Mr. Nyquist).

after you have met his criteria, then
2) you need to carefully choose the internal mathematics so that you do not have any sort of fractionality going on. If you choose poorly, you will end up with an output frequency almost equal to the input frequency, but with a couple hz phase deviation going on (which, obviously, would make it a very unuseable phase modulator).

3) there are programming time lags, and if you plan on changing the modulation as a function of time, you have to realize that the new phase shift will not show up at the output until N clock cycles later.

Rich

The phase is set with the Phase Offset Word (POW), and the number of bits in that word defines the phase resolution. As far as I know it goes up to 14 bits, haven't seen anything higher than that (and I'm not sure anything more precise would be useful).