How to prevent high frequency oscllation in a <2GHz oscillator?
Like with any other oscillator type you have to find out by adjustments how to enforce your oscillator into a single mode under various conditions. When you switch on and off the DC bias, there may be and are other oscillation modes at various frequencies,from DC to ft of your active element. Your enclosure may support such mode so you may need to use absorbing stickers to suppress them.
At 2 GHz, use a high-Q resonator, a coaxial or a dielectric resonator. Use a buffer stage to separate load effects. Use the lowest suitable DC voltage and a good regulator to reduce other possible mode to occur. Adjust DC bias circuit smoothly to obtain the optimum stable state.
All above makes any oscillator design an art, and explains why commercial models are expensive.
Oscillators are more tricky than amplifiers in that an amplifier has to be stable at all frequencies up to where the device gain has fallen away below the point oscillation can happen, whereas in oscillators, the need is for deliberate instability at only one frequency, forced with a high-Q part if possible.
In your case, where the wanted frequency is about 2GHz, and the device has gain right up to 18GHz, it becomes all about layout. All the points mentioned by jiripolivka are very good advice. Add to that some determined care in not allowing any mechanisms that can complete a feedback at the highest frequency. The ways it can happen are sometimes obscure.
1. Try and put a grounded shield tab across the active device layout, maybe with a gap in it to go over the device. Keep the output stuff away from the input
2. The grounding vias, especially near the source of a FET, are sometimes the route for unwanted oscillation feedback. Again, this is about good layout.
3. Consider that the matching condition presented to the device by the band-pass filter might be just what the device needs to take off at higher frequency. Getting practical, sometimes just a very few Ohms in series with a device output can be enough to damp unwanted oscillations. There is, of course, a whole bag-full of other tricks, but they need to be applied appropriately. Sometimes layout can include stubs, or coupled short-circuited rings to deliberately "suction out" and damp unwanted frequencies. One tries to design so it works without them, but sometimes, a fast way to damp the problem is the only way.
To my understanding, your VCO has two resonating points and there is also trajectory between these two points.
As said, your should carefully study your VCO closed loop transfer function in terms of poles and zeros and phase shift between output and input.
A consistent solution is to use high Q resonators and also to avoid proper resonating elements to supress parastic oscillations.
A rule for choosing the active device of a good oscillator is to get a transistor with fT ≤ 2 * fosc.
Of course higher fT transistors would work also, but you have to deal with many issues like the one presented.