Modeling Jitter in PLL-based Frequency Synthesizers

时间：04-05 整理：3721RD 点击：

Does anybody download "Modeling Jitter in PLL-based Frequency Synthesizers" from www.designers-guide.org and test it in cadence?
How to simulate it? can you send me the project in cadence? thanks!

上一篇：Second resonant frequency of a microstrip antenna
下一篇：最后一页

PLL Jitter Modeling 相关文章：

Reference for VCO and PLL
Loop bandwidth of a Charge pump PLL
PLL Synthesized radio
PLL out of lock after several seconds
DDS vs PLL RF Link Budget
PLL Oscillator Issues