Questions about oscillator phase noise simulation in ADS

Hi, everyone. I'm designing a LC cross-coupled oscillator using TSMC 65nm CMOS process. I have simulated the circuit using harmonic balance simulator in ADS. One of the problems I encountered is that the simulation give extremely high phase noise results. In fact, the phase noise is larger than the output signal. I was wondering if I have missed some settings at first, but after I studied some examples provided by Agilent, I found the similar problems in examples\RFIC\MOS_VCO_wrk, the graph is in VCO_wVaractors.dds. Following are the graphs, the first two are simulation results of mine, the third one is graph from the example.

It is simply due to limitation of small signal noise analysis in frequency domain.
We can never get reliable result of phase noise for small offset frequency.
This is true for any vendor's simulator such as Agilent ADSsim, Agilent GoldenGate, Cadence Spectre, Synopsys HSPICE, Mentor Eldo, etc.

See the followings.
http://www.designers-guide.org/Forum...50465395/26#26
http://www.designers-guide.org/Forum...1262097621/1#1
http://www.designers-guide.org/Forum...1260521995/5#5