4layer PCB routing precautions
时间：04-05
整理：3721RD
点击：
Hello,
On a RF PCB (operation freq. : 6-8 GHz)with the stack up details as below, is there any precaution to be taken while routing RF CPWG vis-a-vis a 2 layer RF PCB, especially w.r.t. Cu that is present below all the RF traces in the layers below the top layer (particularly input and output traces of both active and passive MMICs)
Stack up:
L1 : RO4350B
L2 : GND
L3 : Power (FR4)
L4 : Signal
I am told that the Cu beneath the RF input/output pads of the MMIC devices needs to be removed on all layers due to the capacitance it introduces. Is this true for all MMICs, active and passive? If yes, how much Cu area is to be removed? I have seen the gerbers of 4 layer MMIC eval boards of some manufacturers for amplifiers and they don't seem to be following this. What is it that I am missing? Is it only applicable for passive such as filters, couplers etc.?
Also, is there a significant difference between mitered bend implemented in Microstrip and CPWG? or do the equations hold for CPWG with negligible error?
Thank you for reading.
On a RF PCB (operation freq. : 6-8 GHz)with the stack up details as below, is there any precaution to be taken while routing RF CPWG vis-a-vis a 2 layer RF PCB, especially w.r.t. Cu that is present below all the RF traces in the layers below the top layer (particularly input and output traces of both active and passive MMICs)
Stack up:
L1 : RO4350B
L2 : GND
L3 : Power (FR4)
L4 : Signal
I am told that the Cu beneath the RF input/output pads of the MMIC devices needs to be removed on all layers due to the capacitance it introduces. Is this true for all MMICs, active and passive? If yes, how much Cu area is to be removed? I have seen the gerbers of 4 layer MMIC eval boards of some manufacturers for amplifiers and they don't seem to be following this. What is it that I am missing? Is it only applicable for passive such as filters, couplers etc.?
Also, is there a significant difference between mitered bend implemented in Microstrip and CPWG? or do the equations hold for CPWG with negligible error?
Thank you for reading.
You won't remove copper in this stackup. The RF structures have to be designed respectively, e.g. you have only CPW with ground. If pad capacitance becomes a problem, it's the wrong stackup for your design.
Ideally, it should be like that..
RF Signal
RO4350B
GND Plane
FR4
Power Signal
FR4
Power GND Plane
It depends ... if this is co-designed as an entire system, you can use the bondwire series inductance and pad shunt capacitances to compensate each other (same topology as low pass filter). In this case, some known pad capacitance would be part of the design.