ADS layout overlap different layers
时间：04-04
整理：3721RD
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I have to connect the drains of two transistors, node A and B as the figure shows.
The metal contact of both the drain of the two transistors are M1 layer. I can't directly use layer M1 to connect the two drains, since there is another metal line L1 there, which is also M1 layer. I have to use M2 layer to overlap on the M1 layer, as the red line shows.
M1 and M2 has via connected. The LVS shows that the drains are not connected.
Since the two transistor layout are generated from schematic, there is a highlight connection node on the drain, the same color with the layer M1, which might means that they can only connected by layer M1. If I use other layers, like M2, and even M2 is connected by M1 througth Via of M1 and M2. The LVS still can't recognize that M1 and M2 are connected.
How can I solve this problem? Thanks.
The metal contact of both the drain of the two transistors are M1 layer. I can't directly use layer M1 to connect the two drains, since there is another metal line L1 there, which is also M1 layer. I have to use M2 layer to overlap on the M1 layer, as the red line shows.
M1 and M2 has via connected. The LVS shows that the drains are not connected.
Since the two transistor layout are generated from schematic, there is a highlight connection node on the drain, the same color with the layer M1, which might means that they can only connected by layer M1. If I use other layers, like M2, and even M2 is connected by M1 througth Via of M1 and M2. The LVS still can't recognize that M1 and M2 are connected.
How can I solve this problem? Thanks.