Reflection Oscillator Simulation
Could someone comment on this design and help optimize it? Thank you.



You can add in series to the source a small inductor and a small capacitor in parallel. And pick the output signal from the source, where the signal is more sinusoidal (less harmonics) than from the drain.
The minimum level of harmonics you get if you pick the output signal directly from the resonator (using a coupler), but the level is lower, because the coupling cannot be tight.
http://people.engr.ncsu.edu/mbs/Micr...S_Osc1_4up.pdf
Thank you I will try that. I am trying to understand the exact purpose for the need to tune the feedback TX line that is tied to the FET gate. Is it the parasitic capacitance and inductance of the transmission line that contributes to resonant frequency, which is why the oscillator output doesn't oscillate exactly at the resonator frequency?
Also, I noticed that there is only negative conductance locally around the center frequency when looking at the admittance chart. How much of the frequency spectrum should be negative conductance for an optimal design?
TL at the Gate supplies feedback to create a negative impedance for oscillations.The oscillator HB frequency is generally is found lower than Resonator theoritical resonance frequency due to some parasitic capacitive effects around the circuit.But your case seems a bit different because I think there are 2 resonance point in the circuit and HB catches the upper one.
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