ADS optimization and CST discrete ports
时间：04-04
整理：3721RD
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Hi all,
I am trying to optimize input and output impedance for a balanced diode frequency doubler and I am determining those impedances through a balanced circuit with 3 and 3 diodes in ADS as shown in the picture.
I need to match my 3D structure in CST to present the optimal input (first harmonic) and output (second harmonic) impedance to the diodes, in CST I use a discrete port for each one of the diodes.
When I export the structure in ADS to optimize and check s-parms I get a data component (S-parms) with input and output port (waveguide port in CST) and the 6 discrete ports of the diodes, then should I connect 6 source/output impedances to the diode ports? In other words, how does it translate the circuit schematic with the balun in ADS with a balanced/unbalanced structure in CST in terms of embedding impedances?
I am trying to optimize input and output impedance for a balanced diode frequency doubler and I am determining those impedances through a balanced circuit with 3 and 3 diodes in ADS as shown in the picture.
I need to match my 3D structure in CST to present the optimal input (first harmonic) and output (second harmonic) impedance to the diodes, in CST I use a discrete port for each one of the diodes.
When I export the structure in ADS to optimize and check s-parms I get a data component (S-parms) with input and output port (waveguide port in CST) and the 6 discrete ports of the diodes, then should I connect 6 source/output impedances to the diode ports? In other words, how does it translate the circuit schematic with the balun in ADS with a balanced/unbalanced structure in CST in terms of embedding impedances?