What did I do wrong in my circuit design for a 2.4 GHz LNA?
I am sure my matching circuits were correct, to match a 2.4 GHz pre-amp. I would be pleased to give you the values of my L matched networks, so that you could check for me if I designed it correctly. I have attached a picture of my circuit diagram below to show you the matched networks. The s-parameters for bias point at Vds=3V and Id = 30mA is as follows (s2p format): 2.4004 0.60735 -127.6034 7.4564 85.6026 0.061004 29.8354 0.47717 -57.9411. You can also check on the datasheet for the s-parameters as I have posted in the next paragraph.
Schematic
The s2p file that I used for my design had a bias point of Vds = 3V and Id = 30mA, which I believed my Vgs = 0.6V, which is shown in an IV graph on the datasheet, which you can download from this website in pdf: https://www.broadcom.com/products/wi.../fet/atf-55143. So, I used a voltage divider to get Vgs = 0.6V, which I assumed my Vds would equal to 3V and Id would be 30mA; would this be the wrong or correct way of going about the problem? So, when assuming my Vds = 3V and Id = 30mA, I calculated a resistor value to go between Vdd = 5V and Vds = 3V and got roughly 67 Ohms.
CIRCUIT RESULTS:
I also believe my results could have turned out bad, because of bad soldering, but I don?t know if that would have made that big of a difference or not either. A picture of my LNA frontside and backside(ground) are shown below.
frontside
backside (ground)
DC TEST RESULTS:
I also tested the voltages and current and got: Vds = 2.36V, Id = 38.2 mA, and Vgs = 0.6 V. What did I do wrong, to achieve Vds = 3V and Id = 30mA? The schematic is shown above.
MOST IMPORTANT QUESTIONS I HAVE:
What did I do wrong, to achieve Vds = 3V and Id = 30mA?
Would the bias point significantly have changed my LNA resonant frequency to 1.55 GHz and create a mismatch at the output (S22) also for a 1.55 GHz pre-amp?
Could the big splotches of solder at the bottom have made a big difference to create large parasitics at the ground? Also, some of the vias were accidentally filled with solder as shown in the pictures.
Would my L matching networks using lumped components have been a problem too, or did I design incorrectly the L matched networks?
-How did you simulate the circuit to get the expected values ? I mean..
-Did you use a proper model for the transistor with package parasitic elements ?
-Did you use realistic models for ALL passive components ? ( Including Connector Models and VIAS !)
-Did you do a EM simulation with Co-Simulation feature ? ( obligatory for 2.45GHz )
-Did you design Matching Circuits for Lowest Noise or Highest Gain ?
Layout seems OK ( I do not see the details very much )
But what about measurement environment ? Calibrations ?
The difference is coming from the Manufacturing tolerances.The given numbers in any Datasheet are typical values but not exact.In order to arrive to desired values, some adjustment mechanism should be considered. (Variable resistors,adjustable regulator etc.)
Also, Manufacturing tolerances play a great role in RF designs.When you pull out a component let say 3.3pF is never 3.3pF and so on, therefore Tuning is always but always necessary.
what software do you use for simulation? you used s-parameter files which is linear. is itpossible to get nonlinear model from supplier ?