EMC FILTER DESIGN
时间：03-31
整理：3721RD
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I am testing for EMI / EMC test for Conducted Emmission as per Standard IEC61000-6 series. I think that my instrument which is SMPS based has poor filter design as I have seen its trace on spectrum analyser. Please provide me the Applicable Limit Line as per standard for 0.15MHz to 30MHz.
Right now my filter is made of TWO X capacitors (0.1μF/630V), one Common mode choke coil of 7-10mH between Line and Neutral and Two Y capacitors( 0.0033μF) between Line / Neutral and Earth.
But before this I have to assure that my limit line which I have considered is correct. Right now my High limit lines which I have considered is -33dBm and Lower Limit Line is -47dBm. And it is observed that trace is crossing lower limit line.
One peak is crossing the limit at arround 200KHz.
Regards,
Shashank
Right now my filter is made of TWO X capacitors (0.1μF/630V), one Common mode choke coil of 7-10mH between Line and Neutral and Two Y capacitors( 0.0033μF) between Line / Neutral and Earth.
But before this I have to assure that my limit line which I have considered is correct. Right now my High limit lines which I have considered is -33dBm and Lower Limit Line is -47dBm. And it is observed that trace is crossing lower limit line.
One peak is crossing the limit at arround 200KHz.
Regards,
Shashank