How to decide Waveport size of a CPW and Batch mode in HFSS

Hello,

I am new to HFSS, I am using HFSS v11.2 on Windows XP. I am trying to design a CPW with 50 ohm char impedance within a frequency range of 1GHz to 100GHz. Ultimate aim is to make the onwafer calibration structures for TRL measurements at various freqs. The substrate resistivity is 0.1 MΩ and thickness is 725μm, there is an Oxide coating on top of it with thickness = 145nm. The CPW is on top of this oxide layer. It is a Ground Signal Ground confign, All lines are 1μm thick. I am using half of the structure (i.e one Ground line and half the width of the signal line) with PerfH on all sides and targeting 100Ω (so that the full structure gives 50Ω). I am running a freq sweep from 1 GHz to 100 GHz with 10 step increment. The substrate size is 1mmx2mm and the airbox is 1mmx1mmx10mm. I am varying the gap between G and S and the width of the lines to achieve 100Ω for half structure for all freqs in 1GHz to 100 GHz range.

1. I am not sure what is the optimum size of the waveport. Whether I should use a large waveport with Height=4mm and width=2mm or a smaller waveport with H=500μ and W=300μ. How do I decide the optimum size of the waveport?

2. Is there anyway I can run HFSS in batch mode, so that it runs for different combinations of Width of the lines and the gap between them and store the results in separate files which I can analyze later. Instead of manually changing the line widths and gap and waiting for 1hr for the sweep to get over.

I have attached my HFSS file. It will be very helpful if I can get an early response.

Thank You for your time,
Pinak

Can someone please help out with this problem? I am also curious about this question.


Thank you in advance.

1. There is a tutorial on CPW port definition given by Ansoft. It is everywhere on the web. I would do comparison between simulation and measurement to determine the best configuration.

2. Create a parameterized design and do parameter sweep.

Hello,

Thanks for your response, I found that web document port_tutorial.ppt. I tried with a generalised waveport size 300um/500um. But I used only one waveport, and 2 of my sides are PerfH and rest are PerfE, so does it mean the otherend of the CPW hat doesnt have a waveport and which touches a PerfE boundary is shorted? Or do I have to define that side as a radiation boundary or a PML?

2. The tutorial says the min waveport size should be > 3(2*gap+width) but with this cond the waveport size > lambda/2 at 100 GHz and it violates the max size condn given in the tutorial (if the size is > lambda/2 then it becomes a waveguide)... So how do i solve this riddle?

3. Where can I find a procedure to design a onWafer TRL Calibration kit?

Any help will be greatly appreciated.

Note: I am posting this with another ID as I forgot my old password and cant reset it, I dont get any email with password reset instruction in my registered email id).

Thanks,
Pinak

That is what I tried to do--search the tutorial. And I use the width and length it recommand directly. But why? why should it be my port size and why I cannot use other sizes of waveport? What's the reason? I tried several other sizes for it, the differences between them are so small. Also I haven't see the bad performances in HFSS due to the waveport sizes, like Port Fields don't match CPW distribution, Port Fields extend from trace to side, and other results, when I change different sizes just to have a try,

Is there anyone who gets some ideas? Thank you!