Capacitor Boundaries in HFSS

I have a question about the capacitor boundary. I have set up a Lumped RLC boundary and assigned it capacitance (easy enough).

I am wondering, though, how does HFSS treat that? I have noticed discrepancies between a large sheet cap and a tiny sheet cap. It appears as though HFSS distributes the capacitor across the boundary.

If, what I am assuming is correct, is there a way to optimize the simulation? If I make my capacitor pretty thin, it increases the simulation time (I have about 12 of these sheets).

Anyone have experience in this? Or need me to clarify the idea?

I am using the capacitor in a slotted ring FSS. The idea is to tune the FSS using the capacitor.

I got pretty good results (which also agreed well with practice) by actually modeling SMD capacitors 3-dimensionally, meaning a bulk of pec on each end (e.g. 0.5*0.5*0.1mm on each end) and then placing the capacitance sheet in between, in half of the total height (away from the PCB surface).

I would not make them too small, since then the lines (or surfaces, or whatever you design) can have interacting effects which might dominate over those of the capacitance sheet. Also, for very long lines the calculations become (naturally) quite hard for HFSS.